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intel/kunimitsu: Update DPTF settings 

After tuning the temperature values for optimal performance,
this patch updates few DPTF settings for Kunimitsu board.

BUG=None
BRANCH=None
TEST=Built and booted on Kunimitsu boards. Verified these
updated DPTF settings with different workloads.

Change-Id: Ic1c319262d80cc5cb29a8630af213822308f8bed
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/350223
Reviewed-on: https://review.coreboot.org/17069
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Sumeet Pawnikar 2016-10-18 11:15:22 +05:30 committed by Martin Roth
parent 94f50dee63
commit bc6a389049
1 changed files with 12 additions and 12 deletions
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24
src/mainboard/intel/kunimitsu/acpi/dptf.asl
View File

@ -14,15 +14,15 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#define DPTF_CPU_PASSIVE 95 #define DPTF_CPU_PASSIVE 94
#define DPTF_CPU_CRITICAL 99 #define DPTF_CPU_CRITICAL 99
#define DPTF_CPU_ACTIVE_AC0 90 #define DPTF_CPU_ACTIVE_AC0 90
#define DPTF_CPU_ACTIVE_AC1 77 #define DPTF_CPU_ACTIVE_AC1 77
#define DPTF_TSR0_SENSOR_ID 0 #define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" #define DPTF_TSR0_SENSOR_NAME "TMP432_Internal"
#define DPTF_TSR0_PASSIVE 65 #define DPTF_TSR0_PASSIVE 66
#define DPTF_TSR0_CRITICAL 70 #define DPTF_TSR0_CRITICAL 71
#define DPTF_TSR0_ACTIVE_AC0 120 #define DPTF_TSR0_ACTIVE_AC0 120
#define DPTF_TSR0_ACTIVE_AC1 110 #define DPTF_TSR0_ACTIVE_AC1 110
#define DPTF_TSR0_ACTIVE_AC2 47 #define DPTF_TSR0_ACTIVE_AC2 47
@ -33,13 +33,13 @@
#define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_ID 1
#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" #define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top"
#define DPTF_TSR1_PASSIVE 63 #define DPTF_TSR1_PASSIVE 75
#define DPTF_TSR1_CRITICAL 68 #define DPTF_TSR1_CRITICAL 80
#define DPTF_TSR2_SENSOR_ID 2 #define DPTF_TSR2_SENSOR_ID 2
#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom" #define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom"
#define DPTF_TSR2_PASSIVE 64 #define DPTF_TSR2_PASSIVE 65
#define DPTF_TSR2_CRITICAL 69 #define DPTF_TSR2_CRITICAL 70
#define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_CHARGER
#define DPTF_ENABLE_FAN_CONTROL #define DPTF_ENABLE_FAN_CONTROL
@ -83,12 +83,12 @@ Name (DART, Package () {
* Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
* AC7, AC8, AC9 * AC7, AC8, AC9
*/ */
\_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 100, 81, 0, 0, 0, 0, 0, \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 100, 72, 0, 0, 0, 0, 0,
0, 0, 0 0, 0, 0
}, },
Package () { Package () {
\_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 100, 81, 68, 56, 48, 40, \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 100, 72, 68, 49, 39, 38,
35, 0, 0, 0 37, 0, 0, 0
} }
}) })
#endif #endif
@ -125,8 +125,8 @@ Name (MPPC, Package ()
}, },
Package () { /* Power Limit 2 */ Package () { /* Power Limit 2 */
1, /* PowerLimitIndex, 1 for Power Limit 2 */ 1, /* PowerLimitIndex, 1 for Power Limit 2 */
8000, /* PowerLimitMinimum */ 25000, /* PowerLimitMinimum */
8000, /* PowerLimitMaximum */ 25000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */ 1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */ 1000, /* TimeWindowMaximum */
1000 /* StepSize */ 1000 /* StepSize */