{soc/intel/cmn/pcie, mb/google/volteer}: Rename `is_external` variable
Name a variable based on its utility. `is_external` variable adds `ExternalFacingPort` _DSD property to an ACPI device hence rename it to `add_acpi_external_facing_port`. BUG=b:259716145 TEST=Build google/rex with this flag and verify it in SSDT at runtime. SSDT snippet: Name (_DSD, Package (0x04) // _DSD: Device-Specific Data { ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"), Package (0x01) { Package (0x02) { "HotPlugSupportInD3", One } }, ToUUID ("efcc06cc-73ac-4bc3-bff0-76143807c389"), Package (0x01) { Package (0x02) { "ExternalFacingPort", One } } }) Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: I65100283ed9b65037c9890f28ecab41fcfa25d83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69970 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -489,7 +489,7 @@ chip soc/intel/tigerlake
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chip soc/intel/common/block/pcie/rtd3
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H3)"
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register "srcclk_pin" = "3"
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register "is_external" = "1"
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register "add_acpi_external_facing_port" = "1"
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device generic 1 on
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probe DB_SD SD_RTS5261
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end
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@ -44,7 +44,7 @@ struct soc_intel_common_block_pcie_rtd3_config {
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* Add device property indicating the device provides an external PCI port
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* for the OS to apply security restrictions.
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*/
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bool is_external;
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bool add_acpi_external_facing_port;
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/*
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* Allow a device to add the RuntimeD3Storage property even if the detected
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@ -479,7 +479,7 @@ static void pcie_rtd3_acpi_fill_ssdt(const struct device *dev)
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acpi_dp_add_package(dsd, pkg);
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/* Indicate to the OS if the device provides an External facing port. */
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if (config->is_external) {
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if (config->add_acpi_external_facing_port) {
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pkg = acpi_dp_new_table(PCIE_EXTERNAL_PORT_UUID);
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acpi_dp_add_integer(pkg, PCIE_EXTERNAL_PORT_PROPERTY, 1);
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acpi_dp_add_package(dsd, pkg);
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