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{soc/intel/cmn/pcie, mb/google/volteer}: Rename `is_external` variable 

Name a variable based on its utility. `is_external` variable adds
`ExternalFacingPort` _DSD property to an ACPI device hence
rename it to `add_acpi_external_facing_port`.

BUG=b:259716145
TEST=Build google/rex with this flag and verify it in SSDT at
runtime.

SSDT snippet:
   Name (_DSD, Package (0x04)  // _DSD: Device-Specific Data
   {
       ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"),
       Package (0x01)
       {
           Package (0x02)
           {
               "HotPlugSupportInD3",
               One
           }
       },

       ToUUID ("efcc06cc-73ac-4bc3-bff0-76143807c389"),
       Package (0x01)
       {
           Package (0x02)
           {
               "ExternalFacingPort",
               One
           }
        }
    })

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I65100283ed9b65037c9890f28ecab41fcfa25d83
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69970
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kapil Porwal 2022-11-24 17:58:34 +05:30 committed by Subrata Banik
parent 60a422736b
commit bc76109df2
3 changed files with 3 additions and 3 deletions
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2
src/mainboard/google/volteer/variants/baseboard/devicetree.cb
View File

@ -489,7 +489,7 @@ chip soc/intel/tigerlake
chip soc/intel/common/block/pcie/rtd3 chip soc/intel/common/block/pcie/rtd3
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H3)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H3)"
register "srcclk_pin" = "3" register "srcclk_pin" = "3"
register "is_external" = "1" register "add_acpi_external_facing_port" = "1"
device generic 1 on device generic 1 on
probe DB_SD SD_RTS5261 probe DB_SD SD_RTS5261
end end

2
src/soc/intel/common/block/pcie/rtd3/chip.h
View File

@ -44,7 +44,7 @@ struct soc_intel_common_block_pcie_rtd3_config {
* Add device property indicating the device provides an external PCI port * Add device property indicating the device provides an external PCI port
* for the OS to apply security restrictions. * for the OS to apply security restrictions.
*/ */
bool is_external; bool add_acpi_external_facing_port;
/* /*
* Allow a device to add the RuntimeD3Storage property even if the detected * Allow a device to add the RuntimeD3Storage property even if the detected

2
src/soc/intel/common/block/pcie/rtd3/rtd3.c
View File

@ -479,7 +479,7 @@ static void pcie_rtd3_acpi_fill_ssdt(const struct device *dev)
acpi_dp_add_package(dsd, pkg); acpi_dp_add_package(dsd, pkg);
/* Indicate to the OS if the device provides an External facing port. */ /* Indicate to the OS if the device provides an External facing port. */
if (config->is_external) { if (config->add_acpi_external_facing_port) {
pkg = acpi_dp_new_table(PCIE_EXTERNAL_PORT_UUID); pkg = acpi_dp_new_table(PCIE_EXTERNAL_PORT_UUID);
acpi_dp_add_integer(pkg, PCIE_EXTERNAL_PORT_PROPERTY, 1); acpi_dp_add_integer(pkg, PCIE_EXTERNAL_PORT_PROPERTY, 1);
acpi_dp_add_package(dsd, pkg); acpi_dp_add_package(dsd, pkg);