arm64: Set 16 byte alignment and ramstage start address
To align with arm use the RAMSTAGE_BASE Kconfig option for start of ramstage. Also, use 16-byte alignment for the start and end of the sections. 4 bytes were previously used, but it definitely seems more appropriate to at least have the heap handing out 16-byte aligned pointers. BUG=chrome-os-partner:29923 BRANCH=None TEST=Built and booted through attempting to load payload Original-Change-Id: I39329055696ae21a9ed1d9a64769981ab4dcdddd Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/207432 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 6291f3bed705154743be78a881a26dfc9d041c5e) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ic280b4c6435c4f8e0e783fe5bd4694832ce9b550 Reviewed-on: http://review.coreboot.org/8588 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -32,7 +32,7 @@ PHDRS
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SECTIONS
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SECTIONS
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{
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{
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. = CONFIG_SYS_SDRAM_BASE;
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. = CONFIG_RAMSTAGE_BASE;
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/* First we place the code and read only data (typically const declared).
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/* First we place the code and read only data (typically const declared).
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* This could theoretically be placed in rom.
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* This could theoretically be placed in rom.
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*/
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*/
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@ -56,11 +56,11 @@ SECTIONS
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.rodata : {
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.rodata : {
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_rodata = .;
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_rodata = .;
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. = ALIGN(4);
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. = ALIGN(16);
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console_drivers = .;
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console_drivers = .;
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KEEP(*(.rodata.console_drivers));
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KEEP(*(.rodata.console_drivers));
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econsole_drivers = . ;
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econsole_drivers = . ;
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. = ALIGN(4);
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. = ALIGN(16);
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pci_drivers = . ;
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pci_drivers = . ;
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KEEP(*(.rodata.pci_driver));
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KEEP(*(.rodata.pci_driver));
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epci_drivers = . ;
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epci_drivers = . ;
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@ -75,7 +75,7 @@ SECTIONS
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/* kevinh/Ispiri - Added an align, because the objcopy tool
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/* kevinh/Ispiri - Added an align, because the objcopy tool
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* incorrectly converts sections that are not long word aligned.
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* incorrectly converts sections that are not long word aligned.
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*/
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*/
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. = ALIGN(4);
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. = ALIGN(16);
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_erodata = .;
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_erodata = .;
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}
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}
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@ -100,6 +100,7 @@ SECTIONS
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*(.bss)
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*(.bss)
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*(.sbss)
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*(.sbss)
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*(COMMON)
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*(COMMON)
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. = ALIGN(16);
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}
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}
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_ebss = .;
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_ebss = .;
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_end = .;
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_end = .;
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@ -108,13 +109,13 @@ SECTIONS
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* this line.
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* this line.
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*/
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*/
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_heap = .;
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_heap = .;
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.heap . : {
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.heap . : {
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/* Reserve CONFIG_HEAP_SIZE bytes for the heap */
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/* Reserve CONFIG_HEAP_SIZE bytes for the heap */
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. = CONFIG_HEAP_SIZE ;
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. = CONFIG_HEAP_SIZE ;
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. = ALIGN(4);
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. = ALIGN(16);
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}
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}
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_eheap = .;
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_eheap = .;
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/* arm64 chipsets need to define CONFIG_RAMSTAGE_STACK_(TOP|BOTTOM) */
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/* arm64 chipsets need to define CONFIG_RAMSTAGE_STACK_(TOP|BOTTOM) */
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_stack = CONFIG_RAMSTAGE_STACK_BOTTOM;
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_stack = CONFIG_RAMSTAGE_STACK_BOTTOM;
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