Add support for the Winbond W83627EHG Super I/O.
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Bingxun Shi <bingxunshi@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu
Stefan Reinauer
parent
c5708d19fd
commit
bc7ceb1fd1
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##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 AMD
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## Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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config chip.h
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object superio.o
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SIO_COM1
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#define SIO_COM1_BASE 0x3f8
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#endif
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#ifndef SIO_COM2
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#define SIO_COM2_BASE 0x2f8
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#endif
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extern struct chip_operations superio_winbond_w83627ehg_ops;
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#include <pc80/keyboard.h>
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#include <uart8250.h>
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struct superio_winbond_w83627ehg_config {
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struct uart8250 com1, com2;
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struct pc_keyboard keyboard;
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};
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@ -0,0 +1,204 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2000 AG Electronics Ltd.
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* Copyright (C) 2003-2004 Linux Networx
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* Copyright (C) 2004 Tyan
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <console/console.h>
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#include <string.h>
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#include <bitops.h>
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#include <uart8250.h>
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#include <pc80/keyboard.h>
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#include <pc80/mc146818rtc.h>
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#include "chip.h"
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#include "w83627ehg.h"
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static void pnp_enter_ext_func_mode(device_t dev)
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{
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outb(0x87, dev->path.u.pnp.port);
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outb(0x87, dev->path.u.pnp.port);
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}
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static void pnp_exit_ext_func_mode(device_t dev)
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{
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outb(0xaa, dev->path.u.pnp.port);
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}
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static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
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{
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outb(reg, port_base);
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outb(value, port_base + 1);
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}
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static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
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{
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outb(reg, port_base);
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return inb(port_base + 1);
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}
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static void enable_hwm_smbus(device_t dev) {
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/* Set the pin 91,92 as I2C bus. */
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uint8_t reg, value;
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reg = 0x2a;
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value = pnp_read_config(dev, reg);
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value |= (1 << 1);
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pnp_write_config(dev, reg, value);
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}
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static void init_acpi(device_t dev)
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{
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uint8_t value = 0x20;
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int power_on = 1;
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get_option(&power_on, "power_on_after_fail");
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pnp_enter_ext_func_mode(dev);
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pnp_write_index(dev->path.u.pnp.port, 7, 0x0a);
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value = pnp_read_config(dev, 0xe4);
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value &= ~(3 << 5);
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if (power_on) {
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value |= (1 << 5);
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}
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pnp_write_config(dev, 0xe4, value);
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pnp_exit_ext_func_mode(dev);
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}
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static void init_hwm(unsigned long base)
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{
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int i;
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uint8_t reg, value;
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/* reg mask data */
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unsigned hwm_reg_values[] = {
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0x40, 0xff, 0x81, /* Start HWM. */
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0x48, 0x7f, 0x2a, /* Set SMBus base to 0x54 >> 1. */
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};
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for(i = 0; i < sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i += 3) {
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reg = hwm_reg_values[i];
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value = pnp_read_index(base, reg);
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value &= 0xff & (~(hwm_reg_values[i + 1]));
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value |= 0xff & hwm_reg_values[i + 2];
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// printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value);
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pnp_write_index(base, reg, value);
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}
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}
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static void w83627ehg_init(device_t dev)
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{
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struct superio_winbond_w83627ehg_config *conf;
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struct resource *res0, *res1;
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if (!dev->enabled) {
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return;
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}
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conf = dev->chip_info;
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switch(dev->path.u.pnp.device) {
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case W83627EHG_SP1:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_uart8250(res0->base, &conf->com1);
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break;
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case W83627EHG_SP2:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_uart8250(res0->base, &conf->com2);
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break;
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case W83627EHG_KBC:
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res0 = find_resource(dev, PNP_IDX_IO0);
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res1 = find_resource(dev, PNP_IDX_IO1);
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init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
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break;
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case W83627EHG_HWM:
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res0 = find_resource(dev, PNP_IDX_IO0);
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#define HWM_INDEX_PORT 5
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init_hwm(res0->base + HWM_INDEX_PORT);
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break;
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case W83627EHG_ACPI:
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init_acpi(dev);
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break;
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}
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}
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void w83627ehg_pnp_set_resources(device_t dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_resources(dev);
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pnp_exit_ext_func_mode(dev);
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}
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void w83627ehg_pnp_enable_resources(device_t dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_enable_resources(dev);
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switch (dev->path.u.pnp.device) {
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case W83627EHG_HWM:
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printk_debug("w83627ehg hwm smbus enabled\n");
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enable_hwm_smbus(dev);
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break;
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}
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pnp_exit_ext_func_mode(dev);
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}
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void w83627ehg_pnp_enable(device_t dev)
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{
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if (!dev->enabled) {
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_exit_ext_func_mode(dev);
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}
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = w83627ehg_pnp_set_resources,
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.enable_resources = w83627ehg_pnp_enable_resources,
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.enable = w83627ehg_pnp_enable,
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.init = w83627ehg_init,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, W83627EHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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{ &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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// No 4 { 0,},
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{ &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
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{ &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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{ &ops, W83627EHG_GPIO_GAME_MIDI, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
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{ &ops, W83627EHG_WDTO_PLED, },
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{ &ops, W83627EHG_GPIO_SUSLED, },
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{ &ops, W83627EHG_ACPI, },
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{ &ops, W83627EHG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &ops,
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sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
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}
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struct chip_operations superio_winbond_w83627ehg_ops = {
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CHIP_NAME("Winbond W83627EHG Super I/O")
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.enable_dev = enable_dev,
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};
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define W83627EHG_FDC 0 /* Floppy */
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#define W83627EHG_PP 1 /* Parallel Port */
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#define W83627EHG_SP1 2 /* Com1 */
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#define W83627EHG_SP2 3 /* Com2 */
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#define W83627EHG_KBC 5 /* Keyboard & Mouse */
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#define W83627EHG_SFI 6 /* Serial Flash Interface */
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#define W83627EHG_GPIO_GAME_MIDI 7 /* GPIO1, GPIO6, Game Port and MIDI Port */
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#define W83627EHG_WDTO_PLED 8 /* TODO */
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#define W83627EHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5 and SUSLED */
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#define W83627EHG_ACPI 10 /* ACPI */
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#define W83627EHG_HWM 11 /* Hardware Monitor */
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@ -0,0 +1,38 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/romcc_io.h>
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#include "w83627ehg.h"
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static void w83627ehg_disable_dev(device_t dev)
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{
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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}
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static void w83627ehg_enable_dev(device_t dev, unsigned iobase)
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{
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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}
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/romcc_io.h>
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#include "w83627ehg.h"
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static inline void pnp_enter_ext_func_mode(device_t dev)
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{
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unsigned port = dev >> 8;
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outb(0x87, port);
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outb(0x87, port);
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}
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static void pnp_exit_ext_func_mode(device_t dev)
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{
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unsigned port = dev >> 8;
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outb(0xaa, port);
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}
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static void w83627ehg_enable_serial(device_t dev, unsigned iobase)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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pnp_exit_ext_func_mode(dev);
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}
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