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tegra132: Add I2C1 support to funit 

I2C1 was missing in the funit/i2c/addressmap tables/code.

BUG=none
BRANCH=none
TEST=Built Rush and Ryu. Built Rush w/code in mainboard.c
to enable I2C1 for the MAX98090 audio codec - codec could be
configured.

Change-Id: I0c678d21546eedb7404a1d3d4329da777430fc97
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4b623097a2adc4464c17bceed96ec3838beda985
Original-Change-Id: Ibe4f012fa2d427b95cd4672687132b47576b6a9a
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/229574
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9427
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Tom Warren 2014-11-13 12:51:01 -07:00 committed by Patrick Georgi
parent 73ef61072b
commit bc7e387a0f
5 changed files with 6 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/nvidia/tegra132/funitcfg.c
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@ -82,6 +82,7 @@ static const struct clk_dev_control clk_data_arr[] = {
static const struct funit_cfg_data funit_data[] = { static const struct funit_cfg_data funit_data[] = {
FUNIT_DATA(SBC1, sbc1, H), FUNIT_DATA(SBC1, sbc1, H),
FUNIT_DATA(SBC4, sbc4, U), FUNIT_DATA(SBC4, sbc4, U),
FUNIT_DATA(I2C1, i2c1, L),
FUNIT_DATA(I2C2, i2c2, H), FUNIT_DATA(I2C2, i2c2, H),
FUNIT_DATA(I2C3, i2c3, U), FUNIT_DATA(I2C3, i2c3, U),
FUNIT_DATA(I2C5, i2c5, H), FUNIT_DATA(I2C5, i2c5, H),

2
src/soc/nvidia/tegra132/i2c.c
View File

@ -23,7 +23,7 @@
struct tegra_i2c_bus_info tegra_i2c_info[] = { struct tegra_i2c_bus_info tegra_i2c_info[] = {
{ {
.base = (void *)TEGRA_I2C_BASE, .base = (void *)TEGRA_I2C1_BASE,
.reset_bit = CLK_L_I2C1, .reset_bit = CLK_L_I2C1,
.reset_func = &clock_reset_l .reset_func = &clock_reset_l
}, },

2
src/soc/nvidia/tegra132/include/soc/addressmap.h
View File

@ -55,7 +55,7 @@ enum {
TEGRA_APB_UARTE_BASE = TEGRA_APB_MISC_BASE + 0x6400, TEGRA_APB_UARTE_BASE = TEGRA_APB_MISC_BASE + 0x6400,
TEGRA_NAND_BASE = TEGRA_APB_MISC_BASE + 0x8000, TEGRA_NAND_BASE = TEGRA_APB_MISC_BASE + 0x8000,
TEGRA_PWM_BASE = TEGRA_APB_MISC_BASE + 0xA000, TEGRA_PWM_BASE = TEGRA_APB_MISC_BASE + 0xA000,
TEGRA_I2C_BASE = TEGRA_APB_MISC_BASE + 0xC000, TEGRA_I2C1_BASE = TEGRA_APB_MISC_BASE + 0xC000,
TEGRA_SPI_BASE = TEGRA_APB_MISC_BASE + 0xC380, TEGRA_SPI_BASE = TEGRA_APB_MISC_BASE + 0xC380,
TEGRA_I2C2_BASE = TEGRA_APB_MISC_BASE + 0xC400, TEGRA_I2C2_BASE = TEGRA_APB_MISC_BASE + 0xC400,
TEGRA_I2C3_BASE = TEGRA_APB_MISC_BASE + 0xC500, TEGRA_I2C3_BASE = TEGRA_APB_MISC_BASE + 0xC500,

1
src/soc/nvidia/tegra132/include/soc/clock.h
View File

@ -210,6 +210,7 @@ enum {
enum { enum {
CLK_SRC_DEVICE(host1x, PLLM, PLLC2, PLLC, PLLC3, PLLP, UNUSED, PLLA), CLK_SRC_DEVICE(host1x, PLLM, PLLC2, PLLC, PLLC3, PLLP, UNUSED, PLLA),
CLK_SRC_DEVICE(I2C1, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M),
CLK_SRC_DEVICE(I2C2, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M), CLK_SRC_DEVICE(I2C2, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M),
CLK_SRC_DEVICE(I2C3, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M), CLK_SRC_DEVICE(I2C3, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M),
CLK_SRC_DEVICE(I2C5, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M), CLK_SRC_DEVICE(I2C5, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M),

2
src/soc/nvidia/tegra132/include/soc/funitcfg.h
View File

@ -30,6 +30,7 @@
enum { enum {
FUNIT_INDEX(SBC1), FUNIT_INDEX(SBC1),
FUNIT_INDEX(SBC4), FUNIT_INDEX(SBC4),
FUNIT_INDEX(I2C1),
FUNIT_INDEX(I2C2), FUNIT_INDEX(I2C2),
FUNIT_INDEX(I2C3), FUNIT_INDEX(I2C3),
FUNIT_INDEX(I2C5), FUNIT_INDEX(I2C5),
@ -48,6 +49,7 @@ enum {
*/ */
enum { enum {
I2C1_BUS = 0,
I2C2_BUS = 1, I2C2_BUS = 1,
I2C3_BUS = 2, I2C3_BUS = 2,
I2C5_BUS = 4, I2C5_BUS = 4,