GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Drop unused change_i2c_mux() 

Change-Id: I3ac39441746d739ac19e831bb67c76405c24ba27
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5925
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kyösti Mälkki 2014-06-03 12:04:37 +03:00
parent f5bde44df2
commit bc84450082
7 changed files with 0 additions and 130 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/mainboard/amd/serengeti_cheetah/romstage.c
View File

@ -45,22 +45,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
smbus_write_byte(SMBUS_HUB, 0x03, 0); smbus_write_byte(SMBUS_HUB, 0x03, 0);
} }
#if 0
static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_HUB 0x18
int ret, i;
print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
i=2;
do {
ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n");
} while ((ret!=0) && (i-->0));
ret = smbus_write_byte(SMBUS_HUB, 0x03, 0);
print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n");
}
#endif
static inline int spd_read_byte(unsigned device, unsigned address) static inline int spd_read_byte(unsigned device, unsigned address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
@ -209,13 +193,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
} }
#endif #endif
#if 0
for(i=1;i<256;i<<=1) {
change_i2c_mux(i);
dump_smbus_registers();
}
#endif
memreset_setup(); memreset_setup();
//do we need apci timer, tsc...., only debug need it for better output //do we need apci timer, tsc...., only debug need it for better output

19
src/mainboard/broadcom/blast/romstage.c
View File

@ -32,17 +32,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
smbus_send_byte(SMBUS_HUB, device); smbus_send_byte(SMBUS_HUB, device);
} }
#if 0
static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_HUB 0x71
int ret;
print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
ret = smbus_send_byte(SMBUS_HUB, device);
print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\n");
}
#endif
static inline int spd_read_byte(unsigned device, unsigned address) static inline int spd_read_byte(unsigned device, unsigned address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
@ -125,14 +114,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_smbus(); enable_smbus();
#if 0
int i;
for(i=4;i<8;i++) {
change_i2c_mux(i);
dump_smbus_registers();
}
#endif
memreset_setup(); memreset_setup();
// init_timer(); // init_timer();

18
src/mainboard/msi/ms9185/romstage.c
View File

@ -59,16 +59,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f ); smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f );
} }
#if 0
static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_SWITCH1 0x70
#define SMBUS_SWITCH2 0x72
smbus_send_byte(SMBUS_SWITCH1, device & 0x0f);
smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f );
}
#endif
static inline int spd_read_byte(unsigned device, unsigned address) static inline int spd_read_byte(unsigned device, unsigned address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
@ -201,14 +191,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
} }
#endif #endif
#if 0
int i;
for(i=1;i<256;i<<=1) {
change_i2c_mux(i);
dump_smbus_registers();
}
#endif
//do we need apci timer, tsc...., only debug need it for better output //do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */ /* all ap stopped? */
// init_timer(); // Need to use TMICT to synconize FID/VID // init_timer(); // Need to use TMICT to synconize FID/VID

18
src/mainboard/msi/ms9282/romstage.c
View File

@ -58,16 +58,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f); smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f);
} }
#if 0
static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_SWITCH1 0x70
#define SMBUS_SWITHC2 0x72
smbus_send_byte(SMBUS_SWITCH1, device & 0x0f);
smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f);
}
#endif
static inline int spd_read_byte(unsigned device, unsigned address) static inline int spd_read_byte(unsigned device, unsigned address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
@ -174,14 +164,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_smbus(); enable_smbus();
#if 0
int i;
for(i=4;i<8;i++) {
change_i2c_mux(i);
dump_smbus_registers();
}
#endif
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
post_cache_as_ram(); post_cache_as_ram();

24
src/mainboard/supermicro/h8dme/romstage.c
View File

@ -84,30 +84,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
#endif #endif
} }
#if 0
static int smbus_send_byte_one(unsigned device, unsigned char val)
{
return do_smbus_send_byte(SMBUS1_IO_BASE, device, val);
}
static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_SWITCH1 0x48
#define SMBUS_SWITHC2 0x49
smbus_send_byte(SMBUS_SWITCH1, device & 0x0f);
smbus_send_byte_one(SMBUS_SWITCH2, (device >> 4) & 0x0f);
int ret;
print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
dump_smbus_registers();
ret = smbus_send_byte(SMBUS_SWITCH1, device);
print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\n");
dump_smbus_registers();
ret = smbus_send_byte_one(SMBUS_SWITCH2, device);
print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\n");
dump_smbus_registers();
}
#endif
static inline int spd_read_byte(unsigned device, unsigned address) static inline int spd_read_byte(unsigned device, unsigned address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);

12
src/mainboard/tyan/s4880/romstage.c
View File

@ -48,18 +48,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
smbus_write_byte(SMBUS_HUB, 0x03, 0); smbus_write_byte(SMBUS_HUB, 0x03, 0);
} }
#if 0
static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_HUB 0x18
int ret;
print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n");
ret = smbus_write_byte(SMBUS_HUB, 0x03, 0);
print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n");
}
#endif
static inline int spd_read_byte(unsigned device, unsigned address) static inline int spd_read_byte(unsigned device, unsigned address)
{ {

16
src/mainboard/tyan/s4882/romstage.c
View File

@ -53,22 +53,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
smbus_write_byte(SMBUS_HUB, 0x03, 0); smbus_write_byte(SMBUS_HUB, 0x03, 0);
} }
#if 0
static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_HUB 0x18
int ret, i;
print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
i=2;
do {
ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n");
} while ((ret!=0) && (i-->0));
ret = smbus_write_byte(SMBUS_HUB, 0x03, 0);
print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n");
}
#endif
static inline int spd_read_byte(unsigned device, unsigned address) static inline int spd_read_byte(unsigned device, unsigned address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);