src: Fix a typo on "mtrr"

Change "mttrs" to mtrrs.

Change-Id: I4e5930cdcba5e8f5366bb2d4ebbcb659c0c2eb27
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>

src/drivers/intel/fsp1_1/include/fsp/romstage.h

@@ -54,7 +54,7 @@ struct romstage_params {
  *  16.  src/soc/intel/common/romstage.c/romstage_common - return
  *  17.  src/mainboard/.../romstage.c/mainboard_romstage_entry - return
  *  18.  src/soc/intel/common/romstage.c/romstage_main - return
- *  19.  src/soc/intel/common/stack.c/setup_stack_and_mttrs
+ *  19.  src/soc/intel/common/stack.c/setup_stack_and_mtrrs
  *  20.  src/drivers/intel/fsp1_1/cache_as_ram.inc - return, cleanup
  *       after call to romstage_main
  *  21.  FSP binary/TempRamExit

src/soc/intel/baytrail/romstage/romstage.c

@@ -50,7 +50,7 @@
  * Because we can't use global variables the stack is used for allocations --
  * thus the need to call back and forth. */
 
-static void *setup_stack_and_mttrs(void);
+static void *setup_stack_and_mtrrs(void);
 
 static void program_base_addresses(void)
 {
@@ -131,7 +131,7 @@ void * asmlinkage romstage_main(unsigned long bist,
 	/* Call into mainboard. */
 	mainboard_romstage_entry(&rp);
 
-	return setup_stack_and_mttrs();
+	return setup_stack_and_mtrrs();
 }
 
 static struct chipset_power_state power_state CAR_GLOBAL;
@@ -248,9 +248,9 @@ static inline uint32_t *stack_push(u32 *stack, u32 value)
 	return stack;
 }
 
-/* setup_stack_and_mttrs() determines the stack to use after
+/* setup_stack_and_mtrrs() determines the stack to use after
  * cache-as-ram is torn down as well as the MTRR settings to use. */
-static void *setup_stack_and_mttrs(void)
+static void *setup_stack_and_mtrrs(void)
 {
 	int num_mtrrs;
 	uint32_t *slot;

src/soc/intel/broadwell/include/soc/romstage.h

@@ -33,7 +33,7 @@ asmlinkage void *romstage_main(unsigned long bist, uint32_t tsc_lo,
 			       uint32_t tsc_high);
 asmlinkage void romstage_after_car(void);
 void raminit(struct pei_data *pei_data);
-void *setup_stack_and_mttrs(void);
+void *setup_stack_and_mtrrs(void);
 
 struct chipset_power_state;
 struct chipset_power_state *fill_power_state(void);

src/soc/intel/broadwell/romstage/romstage.c

@@ -80,7 +80,7 @@ asmlinkage void *romstage_main(unsigned long bist,
 	/* Call into mainboard. */
 	mainboard_romstage_entry(&rp);
 
-	return setup_stack_and_mttrs();
+	return setup_stack_and_mtrrs();
 }
 
 /* Entry from the mainboard. */

src/soc/intel/broadwell/romstage/stack.c

@@ -30,9 +30,9 @@ static inline uint32_t *stack_push(u32 *stack, u32 value)
 	return stack;
 }
 
-/* setup_stack_and_mttrs() determines the stack to use after
+/* setup_stack_and_mtrrs() determines the stack to use after
  * cache-as-ram is torn down as well as the MTRR settings to use. */
-void *setup_stack_and_mttrs(void)
+void *setup_stack_and_mtrrs(void)
 {
 	int num_mtrrs;
 	uint32_t *slot;