soc/mediatek/mt8195: Add base addresses for display
Add disp_dsc/disp_merge/dp_intf/edptx base addresses. BUG=b:189985956 Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Change-Id: I694da1449154e5b167c10d6d43d25ee2c5c0ec36 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55332 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -84,10 +84,14 @@ enum {
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DISP_GAMMA0_BASE = IO_PHYS + 0x0C006000,
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DISP_GAMMA0_BASE = IO_PHYS + 0x0C006000,
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DISP_DITHER0_BASE = IO_PHYS + 0x0C007000,
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DISP_DITHER0_BASE = IO_PHYS + 0x0C007000,
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DSI0_BASE = IO_PHYS + 0x0C008000,
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DSI0_BASE = IO_PHYS + 0x0C008000,
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DISP_DSC0_BASE = IO_PHYS + 0x0C009000,
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DISP_OVL1_BASE = IO_PHYS + 0x0C00A000,
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DISP_OVL1_BASE = IO_PHYS + 0x0C00A000,
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DISP_MERGE0_BASE = IO_PHYS + 0x0C014000,
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DP_INTF0_BASE = IO_PHYS + 0x0C015000,
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DISP_MUTEX_BASE = IO_PHYS + 0x0C016000,
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DISP_MUTEX_BASE = IO_PHYS + 0x0C016000,
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SMI_LARB0 = IO_PHYS + 0x0C018000,
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SMI_LARB0 = IO_PHYS + 0x0C018000,
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VDOSYS0_BASE = IO_PHYS + 0x0C01A000,
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VDOSYS0_BASE = IO_PHYS + 0x0C01A000,
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SMI_BASE = IO_PHYS + 0x0C01B000,
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SMI_BASE = IO_PHYS + 0x0C01B000,
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EDP_BASE = IO_PHYS + 0x0C500000,
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};
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};
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#endif
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#endif
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