mb/google/kukui: Add panel for Kukui
Support Kukui rev 2 panel (via SSD2858). BUG=b:129299873 BRANCH=none TEST=Build as Kukui and boots on Rev 2 unit. Change-Id: Icc16c4297eb3c6b6a4770a36661a2e3cab418048 Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Hung-Te Lin
Julius Werner
parent
3324e3f814
commit
bca33b43f7
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@ -25,4 +25,5 @@ ramstage-y += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += mainboard.c
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ramstage-y += memlayout.ld
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ramstage-y += memlayout.ld
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ramstage-$(CONFIG_BOARD_GOOGLE_KRANE) += panel_krane.c
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ramstage-$(CONFIG_BOARD_GOOGLE_KRANE) += panel_krane.c
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ramstage-$(CONFIG_BOARD_GOOGLE_KUKUI) += panel_kukui.c
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ramstage-y += reset.c
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ramstage-y += reset.c
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@ -0,0 +1,116 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2019 Huaqin Telecom Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <boardid.h>
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#include <delay.h>
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#include <gpio.h>
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#include "panel.h"
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static void power_on_ssd2858(void)
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{
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gpio_output(GPIO_MIPIBRDG_PWRDN_L_1V8, 0);
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gpio_output(GPIO_MIPIBRDG_RST_L_1V8, 0);
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gpio_output(GPIO_PPVARP_LCD_EN, 1);
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gpio_output(GPIO_PPVARN_LCD_EN, 1);
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gpio_output(GPIO_PP1800_LCM_EN, 1);
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gpio_output(GPIO_PP3300_LCM_EN, 1);
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gpio_output(GPIO_PP1200_MIPIBRDG_EN, 1);
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gpio_output(GPIO_VDDIO_MIPIBRDG_EN, 1);
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mdelay(20);
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gpio_output(GPIO_MIPIBRDG_PWRDN_L_1V8, 1);
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mdelay(20);
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gpio_output(GPIO_MIPIBRDG_RST_L_1V8, 1);
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mdelay(20);
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}
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static struct panel_description P097PFG_SSD2858 = {
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.power_on = power_on_ssd2858,
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.edid = {
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.ascii_string = "CMN P097PFG",
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.panel_bits_per_color = 8,
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.panel_bits_per_pixel = 24,
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.mode = {
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.name = "1536x2048@60Hz",
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.pixel_clock = 211660,
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.lvds_dual_channel = 0,
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.refresh = 60,
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.ha = 1536, .hbl = 160, .hso = 140, .hspw = 10,
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.va = 2048, .vbl = 32, .vso = 20, .vspw = 2,
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.phsync = '-', .pvsync = '-',
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.x_mm = 147, .y_mm = 196,
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},
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},
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.orientation = LB_FB_ORIENTATION_NORMAL,
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.init = {
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INIT_GENERIC_CMD(0xff, 0x00),
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/* LOCKCNT=0x1f4, MRX=0, POSTDIV=1 (/2} }, MULT=0x49
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* 27 Mhz => 985.5 Mhz */
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INIT_GENERIC_CMD(0x00, 0x08, 0x01, 0xf4, 0x01, 0x49),
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/* MTXDIV=1, SYSDIV=3 (=> 4) */
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INIT_GENERIC_CMD(0x00, 0x0c, 0x00, 0x00, 0x00, 0x03),
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/* MTXVPF=24bpp, MRXLS=4 lanes, MRXVB=bypass, MRXECC=1,
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* MRXEOT=1, MRXEE=1 */
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INIT_GENERIC_CMD(0x00, 0x14, 0x0c, 0x3d, 0x80, 0x0f),
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INIT_GENERIC_CMD(0x00, 0x20, 0x15, 0x92, 0x56, 0x7d),
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INIT_GENERIC_CMD(0x00, 0x24, 0x00, 0x00, 0x30, 0x00),
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INIT_GENERIC_CMD(0x10, 0x08, 0x01, 0x20, 0x08, 0x45),
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INIT_GENERIC_CMD(0x10, 0x1c, 0x00, 0x00, 0x00, 0x00),
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INIT_GENERIC_CMD(0x20, 0x0c, 0x00, 0x00, 0x00, 0x04),
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/* Pixel clock 985.5 Mhz * 0x49/0x4b = 959 Mhz */
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INIT_GENERIC_CMD(0x20, 0x10, 0x00, 0x4b, 0x00, 0x49),
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INIT_GENERIC_CMD(0x20, 0xa0, 0x00, 0x00, 0x00, 0x00),
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/* EOT=1, LPE = 0, LSOUT=4 lanes, LPD=25 */
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INIT_GENERIC_CMD(0x60, 0x08, 0x00, 0xd9, 0x00, 0x08),
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INIT_GENERIC_CMD(0x60, 0x14, 0x01, 0x00, 0x01, 0x06),
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/* DSI0 enable (default: probably not needed) */
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INIT_GENERIC_CMD(0x60, 0x80, 0x00, 0x00, 0x00, 0x0f),
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/* DSI1 enable */
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INIT_GENERIC_CMD(0x60, 0xa0, 0x00, 0x00, 0x00, 0x0f),
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/* HSA=0x18, VSA=0x02, HBP=0x50, VBP=0x0c */
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INIT_GENERIC_CMD(0x60, 0x0c, 0x0c, 0x50, 0x02, 0x18),
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/* VACT= 0x800 (2048} }, VFP= 0x14, HFP=0x50 */
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INIT_GENERIC_CMD(0x60, 0x10, 0x08, 0x00, 0x14, 0x50),
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/* HACT=0x300 (768) */
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INIT_GENERIC_CMD(0x60, 0x84, 0x00, 0x00, 0x03, 0x00),
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INIT_GENERIC_CMD(0x60, 0xa4, 0x00, 0x00, 0x03, 0x00),
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/* Take panel out of sleep. */
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INIT_GENERIC_CMD(0xff, 0x01),
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INIT_DCS_CMD(0x11),
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INIT_DELAY_CMD(120),
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INIT_DCS_CMD(0x29),
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INIT_DELAY_CMD(20),
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INIT_GENERIC_CMD(0xff, 0x00),
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INIT_DELAY_CMD(120),
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INIT_DCS_CMD(0x11),
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INIT_DELAY_CMD(120),
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INIT_DCS_CMD(0x29),
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INIT_DELAY_CMD(20),
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INIT_END_CMD,
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},
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};
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struct panel_description *get_panel_description(int panel_id)
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{
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/* The Innolux panel before P2 is no longer supported. */
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if (board_id() < 2)
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return NULL;
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return &P097PFG_SSD2858;
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}
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