mb/google/geralt: Fully calibrate DRAM

Initialize and calibrate DRAM in romstage.

DRAM full calibration logs:
dram_init: dram init end (result: 0)
DRAM-K: Full calibration passed in 50176 msecs

TEST=Full calibration pass.
BUG=b:233720142

Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I31f5693ffe4a1e30defbc8a96dc128de03d6b7e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66278
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/geralt/Makefile.inc

@@ -9,6 +9,7 @@ verstage-y += reset.c
 romstage-y += memlayout.ld
 romstage-y += chromeos.c
 romstage-y += romstage.c
+romstage-y += sdram_configs.c
 
 ramstage-y += memlayout.ld
 ramstage-y += boardid.c

src/mainboard/google/geralt/romstage.c

@@ -2,6 +2,7 @@
 
 #include <arch/stages.h>
 #include <soc/clkbuf.h>
+#include <soc/emi.h>
 #include <soc/mt6315.h>
 #include <soc/mt6359p.h>
 #include <soc/pmif.h>
@@ -14,4 +15,5 @@ void platform_romstage_main(void)
 	mt6359p_init();
 	clk_buf_init();
 	rtc_boot();
+	mtk_dram_init();
 }

src/mainboard/google/geralt/sdram_configs.c

@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+const struct sdram_info *get_sdram_config(void)
+{
+	/*
+	 * The MT8188 platform supports "dram adaptive" feature to automatically
+	 * detect dram information, including channel, rank, die size..., and
+	 * can automatically configure EMI settings. Therefore, we will be
+	 * passing a placeholder param blob.
+	 */
+	static struct sdram_info params;
+	return &params;
+}