GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/picasso: Store ddr_frequency in MT/s 

This field eventually gets interpreted as MT/s by SMBIOS instead of MHz. Translate from Mhz to MT/s by multiplying by 2.

BUG=b:154654737
TEST=dmidecode -t 17 matches expected speed

Change-Id: I51b58cb0380f2a2bf000347395ac918ac0717060
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Rob Barnes 2020-08-17 22:50:10 -06:00 committed by Patrick Georgi
parent 9618706da6
commit bcab8b0a41
1 changed files with 9 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/soc/amd/picasso/dmi.c
View File

@ -27,7 +27,15 @@ static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17,
dimm->ddr_type = dmi17->MemoryType;
dimm->ddr_frequency = dmi17->Speed;
/**
* Based on the name, ddr_frequency should hold the memory clock
* frequency in MHz. However it is interpreted as MT/s in SMBIOS
* downstream. So multiply by 2 to translate to memory speed in MT/s.
* ddr_frequency is used for setting both config speed and max
* speed. Using config speed so we don't get the false impression
* that the RAM is running faster than it actually is.
*/
dimm->ddr_frequency = 2 * dmi17->ConfigSpeed;
dimm->rank_per_dimm = dmi17->Attributes;