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src/mainboard/emulation/qemu-power9: add RAM detection 

Change-Id: Ie333294c7a311f6d47bdfbd1fc3cec0128cf63e7
Signed-off-by: Yaroslav Kurlaev <yaroslav.kurlaev@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Yaroslav Kurlaev 2021-07-06 22:30:28 +07:00 committed by Felix Held
parent e985d211fb
commit bcbcdf7394
4 changed files with 13 additions and 12 deletions
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6
src/mainboard/emulation/qemu-power9/cbmem.c
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@ -1,11 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
#include <ramdetect.h>
void *cbmem_top_chipset(void)
{
/* Top of cbmem is at lowest usable DRAM address below 4GiB. */
/* For now, last 1M of 4G */
void *ptr = (void *) (4ULL * GiB - 1 * MiB);
return ptr;
return (void *)(probe_ramsize(0, CONFIG_DRAM_SIZE_MB) * MiB);
}

1
src/mainboard/emulation/qemu-power9/mainboard.c
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@ -8,6 +8,7 @@ static void mainboard_enable(struct device *dev)
{
if (!dev)
die("No dev0; die\n");
ram_resource(dev, 0, 0, (unsigned long)cbmem_top() / KiB);
}
struct chip_operations mainboard_ops = {

16
src/mainboard/emulation/qemu-power9/memlayout.ld
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@ -10,14 +10,14 @@ SECTIONS
BOOTBLOCK(0, 32K)
STACK(0x8000, 32K)
ROMSTAGE(0xf00000, 1M)
STACK(0x1000000, 32K)
RAMSTAGE(0x1008000, 1M)
PRERAM_CBMEM_CONSOLE(0x10000, 128K)
FMAP_CACHE(0x30000, 4K)
CBFS_MCACHE(0x31000, 8K)
TIMESTAMP(0x33000, 4K)
CBFS_CACHE(0x34000, 512K)
ROMSTAGE(0x100000, 1M)
FMAP_CACHE(0x1108000, 4K)
CBFS_MCACHE(0x1109000, 8K)
TIMESTAMP(0x110b000, 4K)
CBFS_CACHE(0x110c000, 512K)
PRERAM_CBMEM_CONSOLE(0x118c000, 128K)
RAMSTAGE(0x300000, 5M)
}

2
src/mainboard/emulation/qemu-power9/romstage.c
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@ -1,10 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
#include <console/console.h>
#include <program_loading.h>
void main(void)
{
console_init();
cbmem_initialize_empty();
run_ramstage();
}