Doc/mb/asrock/h110m: update info about PEG
- Now there is no need to additionally configure the FSP before building; - PEG works with high link speed 8 GT/s (Gen 3); - external GPU supported, but dynamic switching between iGPU and PEG is not yet supported. Change-Id: Ie0f9db47c0b88052b090cba139f0ae821758935d Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31949 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -21,27 +21,6 @@ FSP Information:
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+-----------------------------+-------------------+-------------------+
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```
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Please take FSP from the directory `3rdparty/fsp/KabylakeFspBinPkg/` in
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the coreboot or download the latest version from [github][FSP github].
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You must use [Intel Binary Configuration Tool] BCT to set the following
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parameters in FSP.fd to initialize the PEG x16 port:
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```
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Peg0Enable = Enable
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Peg0MaxLinkSpeed = Gen3
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Peg0MaxLinkWidth = Auto
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```
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BCT creates Fsp_M.fd, Fsp_S.fd and Fsp_T.fd. These files are integrated
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into the coreboot image. If PEG port is not used, you can get these files
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without BTC:
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```bash
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# split FSP.fd
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python 3rdparty/fsp/Tools/SplitFspBin.py split -f 3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd
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```
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## Building coreboot
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The following steps set the default parameters for this board to build a
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@ -53,8 +32,7 @@ touch .config
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./util/scripts/config --enable VENDOR_ASROCK
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./util/scripts/config --enable BOARD_ASROCK_H110M_DVS
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./util/scripts/config --enable CONFIG_ADD_FSP_BINARIES
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./util/scripts/config --set-str CONFIG_FSP_M_FILE "/path/to/Fsp_M.fd"
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./util/scripts/config --set-str CONFIG_FSP_S_FILE "/path/to/Fsp_S.fd"
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./util/scripts/config --enable CONFIG_FSP_USE_REPO
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./util/scripts/config --set-str REALTEK_8168_MACADDRESS "xx:xx:xx:xx:xx:xx"
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make olddefconfig
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```
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@ -97,10 +75,9 @@ facing towards the bottom of the board.
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## Known issues
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- The VGA port doesn't work.
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- PEG x16 port training correctly runs only at link speed of 2.5GT/s(gen1).
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It takes more time to research the schematic of this board.
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- The VGA port doesn't work. Discrete graphic card is used as primary
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device for display output (if CONFIG_ONBOARD_VGA_IS_PRIMARY is not
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set). Dynamic switching between iGPU and PEG is not yet supported.
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- SuperIO GPIO pin is used to reset Realtek chip. However, since the
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Logical Device 7 (GPIO6, GPIO7, GPIO8) is not initialized, the network
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@ -121,7 +98,7 @@ facing towards the bottom of the board.
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- integrated graphics init with libgfxinit (see [Known issues](#known-issues))
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- PCIe x1
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- PEG x16 Gen1 (see [Known issues](#known-issues))
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- PEG x16 Gen3
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- SATA
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- USB
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- serial port
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@ -131,7 +108,6 @@ facing towards the bottom of the board.
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## TODO
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- PEG x16 Gen3
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- NCT6791D GPIOs
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- onboard network (see [Known issues](#known-issues))
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- S3 suspend/resume
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@ -155,8 +131,6 @@ facing towards the bottom of the board.
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```
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[ASRock H110M-DVS]: https://www.asrock.com/mb/Intel/H110M-DVS%20R2.0/
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[FSP github]: https://github.com/IntelFsp/FSP
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[Intel Binary Configuration Tool]: https://github.com/IntelFsp/BCT
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[MX25L6473E]: http://www.macronix.com/Lists/Datasheet/Attachments/7380/MX25L6473E,%203V,%2064Mb,%20v1.4.pdf
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[flashrom]: https://flashrom.org/Flashrom
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[H110M-DVS manual]: http://asrock.pc.cdn.bitgravity.com/Manual/H110M-DVS%20R2.0.pdf
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