Add Gigadevice SPI rom support
Add support for GigaDevice SPI ROMS. The GD25Q64B device has been tested, the other rom devices added to the file have not. Change-Id: If35676ca6b90329f15667ebb32efa0d1a159ae91 Signed-off-by: Martin Roth <martin@se-eng.com> Reviewed-on: http://review.coreboot.org/1747 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Martin Roth
Stefan Reinauer
parent
39f6bb64d1
commit
bceaf7fea0
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@ -86,3 +86,11 @@ config SPI_FLASH_NO_FAST_READ
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help
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Select this option if your setup requires to avoid "fast read"s
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from the SPI flash parts.
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config SPI_FLASH_GIGADEVICE
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bool
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default y
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depends on SPI_FLASH
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help
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Select this option if your chipset driver needs to store certain
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data in the SPI flash and your SPI flash is made by Gigadevice.
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@ -8,6 +8,7 @@ ramstage-$(CONFIG_SPI_FLASH_SPANSION) += spansion.c
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ramstage-$(CONFIG_SPI_FLASH_SST) += sst.c
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ramstage-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
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ramstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
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ramstage-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
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ramstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
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ifeq ($(CONFIG_SPI_FLASH_SMM),y)
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@ -22,4 +23,5 @@ smm-$(CONFIG_SPI_FLASH_SST) += sst.c
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smm-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
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smm-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
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smm-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
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smm-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
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endif
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@ -0,0 +1,241 @@
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/*
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* Copyright (c) 2012, Google Inc.
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*
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* Based on drivers/spi/winbond.c
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*
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* Copyright 2008, Network Appliance Inc.
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* Jason McMullan <mcmullan@netapp.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <stdlib.h>
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#include <spi_flash.h>
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#include "spi_flash_internal.h"
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/* GD25Pxx-specific commands */
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#define CMD_GD25_WREN 0x06 /* Write Enable */
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#define CMD_GD25_WRDI 0x04 /* Write Disable */
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#define CMD_GD25_RDSR 0x05 /* Read Status Register */
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#define CMD_GD25_WRSR 0x01 /* Write Status Register */
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#define CMD_GD25_READ 0x03 /* Read Data Bytes */
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#define CMD_GD25_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
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#define CMD_GD25_PP 0x02 /* Page Program */
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#define CMD_GD25_SE 0x20 /* Sector (4K) Erase */
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#define CMD_GD25_BE 0xd8 /* Block (64K) Erase */
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#define CMD_GD25_CE 0xc7 /* Chip Erase */
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#define CMD_GD25_DP 0xb9 /* Deep Power-down */
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#define CMD_GD25_RES 0xab /* Release from DP, and Read Signature */
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struct gigadevice_spi_flash_params {
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uint16_t id;
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/* Log2 of page size in power-of-two mode */
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uint8_t l2_page_size;
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uint16_t pages_per_sector;
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uint16_t sectors_per_block;
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uint16_t nr_blocks;
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const char *name;
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};
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/* spi_flash needs to be first so upper layers can free() it */
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struct gigadevice_spi_flash {
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struct spi_flash flash;
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const struct gigadevice_spi_flash_params *params;
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};
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static inline struct gigadevice_spi_flash *
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to_gigadevice_spi_flash(struct spi_flash *flash)
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{
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return container_of(flash, struct gigadevice_spi_flash, flash);
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}
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static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = {
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{
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.id = 0x4014,
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.l2_page_size = 8,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 16,
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.name = "GD25Q80",
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},
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{
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.id = 0x4015,
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.l2_page_size = 8,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 32,
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.name = "GD25Q16(B)",
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},
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{
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.id = 0x4016,
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.l2_page_size = 8,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 64,
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.name = "GD25Q32(B)",
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},
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{
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.id = 0x6016,
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.l2_page_size = 8,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 64,
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.name = "GD25LQ32",
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},
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{
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.id = 0x4017,
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.l2_page_size = 8,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 128,
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.name = "GD25Q64(B)",
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},
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{
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.id = 0x4018,
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.l2_page_size = 8,
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.pages_per_sector = 16,
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.sectors_per_block = 16,
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.nr_blocks = 256,
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.name = "GD25Q128(B)",
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},
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};
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static int gigadevice_write(struct spi_flash *flash, u32 offset,
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size_t len, const void *buf)
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{
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struct gigadevice_spi_flash *stm = to_gigadevice_spi_flash(flash);
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unsigned long byte_addr;
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unsigned long page_size;
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size_t chunk_len;
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size_t actual;
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int ret;
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u8 cmd[4];
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page_size = min(1 << stm->params->l2_page_size, CONTROLLER_PAGE_LIMIT);
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byte_addr = offset % page_size;
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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printk(BIOS_WARNING,
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"SF gigadevice.c: Unable to claim SPI bus\n");
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return ret;
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}
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for (actual = 0; actual < len; actual += chunk_len) {
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chunk_len = min(len - actual, page_size - byte_addr);
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ret = spi_flash_cmd(flash->spi, CMD_GD25_WREN, NULL, 0);
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if (ret < 0) {
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printk(BIOS_WARNING,
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"SF gigadevice.c: Enabling Write failed\n");
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goto out;
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}
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cmd[0] = CMD_GD25_PP;
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cmd[1] = (offset >> 16) & 0xff;
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cmd[2] = (offset >> 8) & 0xff;
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cmd[3] = offset & 0xff;
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#if CONFIG_DEBUG_SPI_FLASH
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printk(BIOS_SPEW,
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"PP gigadevice.c: %#p => cmd = { %#02x %#02x%02x%02x }"
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" chunk_len = %zu\n", buf + actual,
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cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
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#endif
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ret = spi_flash_cmd_write(flash->spi, cmd, 4,
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buf + actual, chunk_len);
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if (ret < 0) {
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printk(BIOS_WARNING,
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"SF gigadevice.c: Page Program failed\n");
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goto out;
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}
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ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
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if (ret)
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goto out;
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offset += chunk_len;
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byte_addr = 0;
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}
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printk(BIOS_INFO,
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"SF gigadevice.c: Successfully programmed %zu bytes @ %#x\n",
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len, (unsigned int)(offset - len));
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ret = 0;
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out:
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spi_release_bus(flash->spi);
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return ret;
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}
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static int gigadevice_erase(struct spi_flash *flash, u32 offset, size_t len)
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{
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return spi_flash_cmd_erase(flash, CMD_GD25_SE, offset, len);
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}
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struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi, u8 *idcode)
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{
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const struct gigadevice_spi_flash_params *params;
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unsigned page_size;
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struct gigadevice_spi_flash *stm;
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(gigadevice_spi_flash_table); i++) {
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params = &gigadevice_spi_flash_table[i];
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if (params->id == ((idcode[1] << 8) | idcode[2]))
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break;
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}
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if (i == ARRAY_SIZE(gigadevice_spi_flash_table)) {
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printk(BIOS_WARNING,
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"SF gigadevice.c: Unsupported ID %#02x%02x\n",
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idcode[1], idcode[2]);
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return NULL;
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}
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stm = malloc(sizeof(struct gigadevice_spi_flash));
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if (!stm) {
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printk(BIOS_WARNING,
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"SF gigadevice.c: Failed to allocate memory\n");
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return NULL;
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}
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stm->params = params;
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stm->flash.spi = spi;
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stm->flash.name = params->name;
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/* Assuming power-of-two page size initially. */
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page_size = 1 << params->l2_page_size;
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stm->flash.write = gigadevice_write;
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stm->flash.erase = gigadevice_erase;
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#ifdef CONFIG_SPI_FLASH_NO_FAST_READ
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stm->flash.read = spi_flash_cmd_read_slow;
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#else
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stm->flash.read = spi_flash_cmd_read_fast;
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#endif
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stm->flash.sector_size = (1 << stm->params->l2_page_size) *
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stm->params->pages_per_sector;
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stm->flash.size = page_size * params->pages_per_sector
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* params->sectors_per_block
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* params->nr_blocks;
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return &stm->flash;
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}
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@ -218,6 +218,9 @@ static struct {
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#if CONFIG_SPI_FLASH_EON
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{ 0, 0x1c, spi_flash_probe_eon, },
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#endif
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#if CONFIG_SPI_FLASH_GIGADEVICE
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{ 0, 0xc8, spi_flash_probe_gigadevice, },
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#endif
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#if CONFIG_SPI_FLASH_MACRONIX
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{ 0, 0xc2, spi_flash_probe_macronix, },
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#endif
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@ -78,4 +78,6 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode);
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struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode);
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struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode);
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struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode);
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struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi,
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u8 *idcode);
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struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);
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