diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb
index e2ae392de3..af3de6c96d 100644
--- a/src/mainboard/lenovo/t430s/devicetree.cb
+++ b/src/mainboard/lenovo/t430s/devicetree.cb
@@ -67,6 +67,10 @@ chip northbridge/intel/sandybridge
 
 			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
 
+			register "xhci_switchable_ports" = "0xf"
+			register "superspeed_capable_ports" = "0xf"
+			register "xhci_overcurrent_mapping" = "0x4000201"
+
 			# Enable zero-based linear PCIe root port functions
 			register "pcie_port_coalesce" = "1"
 			register "c2_latency" = "101"  # c2 not supported
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index 6b769b0397..d59524bf02 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -68,6 +68,10 @@ chip northbridge/intel/sandybridge
 
 			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
 
+			register "xhci_switchable_ports" = "0xf"
+			register "superspeed_capable_ports" = "0xf"
+			register "xhci_overcurrent_mapping" = "0x4000201"
+
 			device pci 14.0 on end # USB 3.0 Controller
 			device pci 16.0 on end # Management Engine Interface 1
 			device pci 16.1 off end # Management Engine Interface 2
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index 08c937f286..55677a3d7d 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -69,6 +69,7 @@ chip northbridge/intel/sandybridge
 
 			register "xhci_switchable_ports" = "0xf"
 			register "superspeed_capable_ports" = "0xf"
+			register "xhci_overcurrent_mapping" = "0x4000201"
 
 			# Enable zero-based linear PCIe root port functions
 			register "pcie_port_coalesce" = "1"