From bd0fa62b6be176395dc119099236709e52a6203e Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Mon, 28 Dec 2020 10:32:50 +0100 Subject: [PATCH] soc/intel/skylake: Add 4 missing root ports to chipset dt MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Kaby Lake PCH can have up to 24 PCIe root ports. Thus, add 4 missing root ports to the chipset devicetree. Change-Id: I443fb736873d47f1b6fe7718a10e1bb4ae5df2a6 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/48947 Reviewed-by: Nico Huber Reviewed-by: Tim Wawrzynczak Reviewed-by: Michael Niewöhner Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/chipset.cb | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb index 136630efa9..28ee53d3ad 100644 --- a/src/soc/intel/skylake/chipset.cb +++ b/src/soc/intel/skylake/chipset.cb @@ -31,6 +31,10 @@ chip soc/intel/skylake device pci 1b.1 alias pcie_rp18 off end # PCI Express Port 18 device pci 1b.2 alias pcie_rp19 off end # PCI Express Port 19 device pci 1b.3 alias pcie_rp20 off end # PCI Express Port 20 + device pci 1b.4 alias pcie_rp21 off end # PCI Express Port 21 + device pci 1b.5 alias pcie_rp22 off end # PCI Express Port 22 + device pci 1b.6 alias pcie_rp23 off end # PCI Express Port 23 + device pci 1b.7 alias pcie_rp24 off end # PCI Express Port 24 device pci 1c.0 alias pcie_rp1 off end # PCI Express Port 1 device pci 1c.1 alias pcie_rp2 off end # PCI Express Port 2 device pci 1c.2 alias pcie_rp3 off end # PCI Express Port 3