apple/macbook21: EC handling ACPI implementation.
Now battery indicator and lid work. Change-Id: I2f747a408e331a245d91dd5f9c7ead0729f02a67 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5323 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
This commit is contained in:
Vladimir Serbinenko
parent
9b90824a1f
commit
bd146e0c97
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@ -0,0 +1,218 @@
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Device(EC)
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{
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Name(_HID, EISAID("PNP0C09"))
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Name(_UID, 0)
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Name(_GPE, 0x17)
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Mutex(ECLK, 0)
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OperationRegion(ERAM, EmbeddedControl, 0x00, 0x100)
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Field(ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset(0x01),
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LIDS, 1, /* Lid status */
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HPAC, 1,
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Offset(0x02),
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WKLD, 1, /* Lid wake */
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Offset(0x20),
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SPTR, 8,
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SSTS, 8,
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SADR, 8,
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SCMD, 8,
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SBFR, 256,
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}
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Field(ERAM, ByteAcc, Lock, Preserve)
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{
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Offset(0x24),
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SBDW, 16,
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}
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Method(SBPC, 0, NotSerialized)
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{
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Store(1000, Local0)
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While(Local0)
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{
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If(LEqual(SPTR, 0x00))
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{
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Return()
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}
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Sleep(1)
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Decrement(Local0)
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}
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}
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Method(SBRW, 2, NotSerialized)
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{
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Acquire(ECLK, 0xFFFF)
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Store(ShiftLeft(Arg0, 0x01), SADR)
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Store(Arg1, SCMD)
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Store(0x09, SPTR)
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SBPC()
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Store(SBDW, Local0)
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Release(ECLK)
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Return(Local0)
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}
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Method(SBRB, 2, NotSerialized)
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{
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Acquire(ECLK, 0xFFFF)
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Store(ShiftLeft(Arg0, 0x01), SADR)
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Store(Arg1, SCMD)
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Store(0x0B, SPTR)
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SBPC()
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Store(SBFR, Local0)
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Release(ECLK)
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Return(Local0)
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}
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/* LID status change. */
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Method(_Q20, 0, NotSerialized)
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{
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Notify(LID, 0x80)
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}
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/* AC status change. */
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Method(_Q21, 0, NotSerialized)
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{
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Notify(AC, 0x80)
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}
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Method(_CRS, 0)
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{
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Name(ECMD, ResourceTemplate()
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{
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IO(Decode16, 0x62, 0x62, 1, 1)
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IO(Decode16, 0x66, 0x66, 1, 1)
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})
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Return(ECMD)
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}
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Method(_INI, 0, NotSerialized)
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{
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}
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Device(LID)
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{
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Name(_HID, "PNP0C0D")
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Method(_LID, 0, NotSerialized)
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{
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return(LIDS)
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}
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}
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Device(AC)
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{
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Name(_HID, "ACPI0003")
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Name(_UID, 0x00)
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Name(_PCL, Package() { \_SB } )
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Method(_PSR, 0, NotSerialized)
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{
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return(HPAC)
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}
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Method(_STA, 0, NotSerialized)
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{
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Return(0x0f)
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}
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}
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Device(BAT0)
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{
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Name(_HID, EisaId("PNP0C0A"))
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Name(_UID, 0x00)
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Name(_PCL, Package() { \_SB })
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Name(BATS, Package()
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{
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0x00, // 0: PowerUnit: Report in mWh
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0xFFFFFFFF, // 1: Design cap
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0xFFFFFFFF, // 2: Last full charge cap
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0x01, // 3: Battery Technology
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10800, // 4: Design Voltage(mV)
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0x00, // 5: Warning design capacity
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200, // 6: Low design capacity
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10, // 7: granularity1
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10, // 8: granularity2
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"", // 9: Model number
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"", // A: Serial number
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"", // B: Battery Type
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"" // C: OEM information
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})
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Name(BATI, Package()
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{
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0, // Battery State
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// Bit 0 - discharge
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// Bit 1 - charge
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// Bit 2 - critical state
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0, // Battery present Rate
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0, // Battery remaining capacity
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0 // Battery present voltage
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})
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Method(_BIF, 0, NotSerialized)
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{
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Multiply(^^SBRW(0x0B, 0x18), 10, Index(BATS, 0x01))
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Multiply(^^SBRW(0x0B, 0x10), 10, Index(BATS, 0x02))
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Store(^^SBRW(0x0B, 0x19), Index(BATS, 0x04))
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Store(^^SBRB(0x0B, 0x21), Index(BATS, 0x09))
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Store(^^SBRB(0x0B, 0x22), Index(BATS, 0x0B))
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Store(^^SBRB(0x0B, 0x20), Index(BATS, 0x0C))
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Return(BATS)
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}
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Method(_STA, 0, NotSerialized)
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{
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If(And(^^SBRW(0x0A, 0x01), 0x01)) {
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Return(0x1f)
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} else {
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Return(0x0f)
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}
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}
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Method(_BST, 0, NotSerialized)
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{
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/* Check for battery presence. */
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If(LNot(And(^^SBRW(0x0A, 0x01), 0x01))) {
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Return(Package(4) {
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0,
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0xFFFFFFFF,
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0xFFFFFFFF,
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0xFFFFFFFF
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})
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}
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Store(^^SBRW(0x0B, 0x09), Local1)
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Store(Local1, Index(BATI, 0x03))
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Store(^^SBRW(0x0B, 0x0A), Local0)
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/* Sign-extend Local0. */
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If(And(Local0, 0x8000))
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{
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Not(Local0, Local0)
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And(Increment(Local0), 0xFFFF, Local0)
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}
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Multiply(Local0, Local1, Local0)
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Divide(Local0, 1000, , Index(BATI, 1))
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Multiply(^^SBRW(0x0B, 0x0F), 10, Index(BATI, 2))
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If(HPAC)
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{
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If(LNot(And(^^SBRW(0x0B, 0x16), 0x40))) {
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Store(2, Index(BATI, 0))
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} Else {
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Store(0, Index(BATI, 0))
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}
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}
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Else
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{
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Store(0x01, Index(BATI, 0))
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}
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Return(BATI)
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}
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}
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}
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@ -57,9 +57,8 @@ chip northbridge/intel/i945
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# 0 No effect (default)
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# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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register "gpi13_routing" = "2"
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register "gpi12_routing" = "1"
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register "gpi8_routing" = "2"
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register "gpi1_routing" = "2"
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register "gpi7_routing" = "2"
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register "sata_ahci" = "0x1"
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register "sata_ports_implemented" = "0x04"
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@ -19,7 +19,6 @@
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* MA 02110-1301 USA
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*/
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#define THINKPAD_EC_GPE 28
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#define BRIGHTNESS_UP \DSPC.BRTU
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#define BRIGHTNESS_DOWN \DSPC.BRTD
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#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
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