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ryu: Update BCT to Max Frequency 924MHz 

Replace previous 528MHz BCT. This BCT contains four entries as below:
0: Samsung
1: Hynix
2: Micron
3: (spare) 528MHz Micron

BUG=none
BRANCH=none
TEST=Built and tested on Micron LPDDR.

Change-Id: Ibe9e299ac1dd4cabd390b2e78bbec6c0f3a3871b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3fcb3e82998c88220e87118efff0595ba3572e38
Original-Change-Id: I49e18ca8dc69f2ce9ded71f4f55c02a8b91f92b2
Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/211479
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Reviewed-on: http://review.coreboot.org/8919
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Jimmy Zhang 2014-08-07 16:31:15 -07:00 committed by Patrick Georgi
parent 9a1691dabe
commit bd2b59cf2b
2 changed files with 1388 additions and 1 deletions
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2
src/mainboard/google/rush_ryu/bct/Makefile.inc
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@ -22,7 +22,7 @@ bct-cfg-$(CONFIG_RUSH_RYU_BCT_CFG_SPI) += spi.cfg
bct-cfg-y += odmdata.cfg bct-cfg-y += odmdata.cfg
bct-cfg-y += jtag.cfg bct-cfg-y += jtag.cfg
#NOTE: When full LPDDR3 SDRAM config is done in bootblock, remove this #NOTE: When full LPDDR3 SDRAM config is done in bootblock, remove this
bct-cfg-$(CONFIG_BOOTROM_SDRAM_INIT) += sdram-ryu-4GB-528-Micron-full.cfg bct-cfg-$(CONFIG_BOOTROM_SDRAM_INIT) += sdram-4GB-924.cfg
# Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate # Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
# the include files (sdram-*.inc) by running "./cfg2inc.sh sdram-*.cfg". # the include files (sdram-*.inc) by running "./cfg2inc.sh sdram-*.cfg".

1387
src/mainboard/google/rush_ryu/bct/sdram-4GB-924.cfg Normal file
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