MP Table: Change types to be consistent with the spec
Update the elements in the MP Spec structures with appropriate types to more accurately reflect the real sizes of the bit fields in the MP Tables. Also add a function for PCI I/O interrupts since these are handled slightly differently than the other I/O interrupt entries. The src_bus_irq field is defined where Bits 1-0: PIRQ pin: INT_A# = 0, INT_B# = 1, INT_C# = 2, INT_D# = 3 Bits 2-6: Originating PCI Device Number Bit 7: Reserved Change-Id: I693407beaa0ee454f49464e43ed45d8cba3b18fc Signed-off-by: Mike Loptien <mike.loptien@se-eng.com> Reviewed-on: http://review.coreboot.org/6050 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Mike Loptien
parent
e96f4b1122
commit
bd4553bb4c
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@ -73,7 +73,7 @@ static unsigned char smp_compute_checksum(void *v, int len)
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return checksum;
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}
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static void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_physptr, unsigned int virtualwire)
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static void *smp_write_floating_table_physaddr(u32 addr, u32 mpf_physptr, unsigned int virtualwire)
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{
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struct intel_mp_floating *mf;
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void *v;
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@ -108,9 +108,10 @@ void *smp_next_mpc_entry(struct mp_config_table *mc)
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{
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void *v;
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v = (void *)(((char *)mc) + mc->mpc_length);
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return v;
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}
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static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length)
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static void smp_add_mpc_entry(struct mp_config_table *mc, u16 length)
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{
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mc->mpc_length += length;
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mc->mpc_entry_count++;
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@ -120,6 +121,7 @@ void *smp_next_mpe_entry(struct mp_config_table *mc)
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{
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void *v;
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v = (void *)(((char *)mc) + mc->mpc_length + mc->mpe_length);
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return v;
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}
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static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
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@ -127,10 +129,14 @@ static void smp_add_mpe_entry(struct mp_config_table *mc, mpe_t mpe)
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mc->mpe_length += mpe->mpe_length;
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}
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/*
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* Type 0: Processor Entries:
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* Entry Type, LAPIC ID, LAPIC Version, CPU Flags EN/BP,
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* CPU Signature (Stepping, Model, Family), Feature Flags
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*/
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void smp_write_processor(struct mp_config_table *mc,
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unsigned char apicid, unsigned char apicver,
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unsigned char cpuflag, unsigned int cpufeature,
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unsigned int featureflag)
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u8 apicid, u8 apicver, u8 cpuflag,
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u32 cpufeature, u32 featureflag)
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{
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struct mpc_config_processor *mpc;
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mpc = smp_next_mpc_entry(mc);
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@ -144,7 +150,8 @@ void smp_write_processor(struct mp_config_table *mc,
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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/* If we assume a symmetric processor configuration we can
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/*
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* If we assume a symmetric processor configuration we can
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* get all of the information we need to write the processor
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* entry from the bootstrap processor.
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* Plus I don't think linux really even cares.
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@ -183,7 +190,8 @@ void smp_write_processors(struct mp_config_table *mc)
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cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
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if(cpu->path.apic.apic_id == order_id) {
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smp_write_processor(mc, cpu->path.apic.apic_id, apic_version,
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smp_write_processor(mc,
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cpu->path.apic.apic_id, apic_version,
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cpu_flag, cpu_features, cpu_feature_flags
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);
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break;
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@ -192,8 +200,12 @@ void smp_write_processors(struct mp_config_table *mc)
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}
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}
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/*
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* Type 1: Bus Entries:
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* Entry Type, Bus ID, Bus Type
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*/
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static void smp_write_bus(struct mp_config_table *mc,
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unsigned char id, const char *bustype)
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u8 id, const char *bustype)
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{
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struct mpc_config_bus *mpc;
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mpc = smp_next_mpc_entry(mc);
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@ -204,9 +216,13 @@ static void smp_write_bus(struct mp_config_table *mc,
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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/*
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* Type 2: I/O APIC Entries:
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* Entry Type, APIC ID, Version,
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* APIC Flags:EN, Address
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*/
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void smp_write_ioapic(struct mp_config_table *mc,
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unsigned char id, unsigned char ver,
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unsigned long apicaddr)
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u8 id, u8 ver, u32 apicaddr)
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{
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struct mpc_config_ioapic *mpc;
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mpc = smp_next_mpc_entry(mc);
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@ -219,10 +235,15 @@ void smp_write_ioapic(struct mp_config_table *mc,
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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/*
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* Type 3: I/O Interrupt Table Entries:
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* Entry Type, Int Type, Int Polarity, Int Level,
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* Source Bus ID, Source Bus IRQ, Dest APIC ID, Dest PIN#
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*/
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void smp_write_intsrc(struct mp_config_table *mc,
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unsigned char irqtype, unsigned short irqflag,
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unsigned char srcbus, unsigned char srcbusirq,
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unsigned char dstapic, unsigned char dstirq)
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u8 irqtype, u16 irqflag,
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u8 srcbus, u8 srcbusirq,
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u8 dstapic, u8 dstirq)
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{
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struct mpc_config_intsrc *mpc;
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mpc = smp_next_mpc_entry(mc);
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@ -242,9 +263,27 @@ void smp_write_intsrc(struct mp_config_table *mc,
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#endif
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}
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/*
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* Type 3: I/O Interrupt Table Entries for PCI Devices:
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* This has the same fields as 'Type 3: I/O Interrupt Table Entries'
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* but the Source Bus IRQ field has a slightly different
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* definition:
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* Bits 1-0: PIRQ pin: INT_A# = 0, INT_B# = 1, INT_C# = 2, INT_D# = 3
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* Bits 2-6: Originating PCI Device Number (Not its parent bridge device number)
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* Bit 7: Reserved
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*/
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void smp_write_pci_intsrc(struct mp_config_table *mc,
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u8 irqtype, u8 srcbus, u8 dev, u8 pirq,
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u8 dstapic, u8 dstirq)
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{
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u8 srcbusirq = (dev << 2) | pirq;
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printk(BIOS_SPEW, "\tPCI srcbusirq = 0x%x from dev = 0x%x and pirq = %x\n", srcbusirq, dev, pirq);
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smp_write_intsrc(mc, irqtype, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, srcbus,
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srcbusirq, dstapic, dstirq);
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}
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void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
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unsigned char irqtype, unsigned short irqflag,
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struct device *dev,
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u8 irqtype, u16 irqflag, struct device *dev,
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unsigned char dstapic, unsigned char *dstirq)
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{
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struct device *child;
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@ -293,10 +332,16 @@ next:
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}
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}
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/*
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* Type 4: Local Interrupt Assignment Entries:
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* Entry Type, Int Type, Int Polarity, Int Level,
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* Source Bus ID, Source Bus IRQ, Dest LAPIC ID,
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* Dest LAPIC LINTIN#
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*/
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void smp_write_lintsrc(struct mp_config_table *mc,
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unsigned char irqtype, unsigned short irqflag,
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unsigned char srcbusid, unsigned char srcbusirq,
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unsigned char destapic, unsigned char destapiclint)
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u8 irqtype, u16 irqflag,
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u8 srcbusid, u8 srcbusirq,
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u8 destapic, u8 destapiclint)
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{
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struct mpc_config_lintsrc *mpc;
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mpc = smp_next_mpc_entry(mc);
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@ -311,10 +356,15 @@ void smp_write_lintsrc(struct mp_config_table *mc,
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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/*
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* Type 128: System Address Space Mapping Entries
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* Entry Type, Entry Length, Bus ID, Address Type,
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* Address Base Lo/Hi, Address Length Lo/Hi
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*/
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void smp_write_address_space(struct mp_config_table *mc,
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unsigned char busid, unsigned char address_type,
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unsigned int address_base_low, unsigned int address_base_high,
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unsigned int address_length_low, unsigned int address_length_high)
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u8 busid, u8 address_type,
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u32 address_base_low, u32 address_base_high,
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u32 address_length_low, u32 address_length_high)
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{
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struct mp_exten_system_address_space *mpe;
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mpe = smp_next_mpe_entry(mc);
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@ -330,10 +380,13 @@ void smp_write_address_space(struct mp_config_table *mc,
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smp_add_mpe_entry(mc, (mpe_t)mpe);
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}
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/*
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* Type 129: Bus Hierarchy Descriptor Entry
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* Entry Type, Entry Length, Bus ID, Bus Info,
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* Parent Bus ID
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*/
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void smp_write_bus_hierarchy(struct mp_config_table *mc,
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unsigned char busid, unsigned char bus_info,
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unsigned char parent_busid)
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u8 busid, u8 bus_info, u8 parent_busid)
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{
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struct mp_exten_bus_hierarchy *mpe;
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mpe = smp_next_mpe_entry(mc);
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@ -346,9 +399,14 @@ void smp_write_bus_hierarchy(struct mp_config_table *mc,
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smp_add_mpe_entry(mc, (mpe_t)mpe);
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}
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/*
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* Type 130: Compatibility Bus Address Space Modifier Entry
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* Entry Type, Entry Length, Bus ID, Address Modifier
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* Predefined Range List
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*/
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void smp_write_compatibility_address_space(struct mp_config_table *mc,
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unsigned char busid, unsigned char address_modifier,
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unsigned int range_list)
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u8 busid, u8 address_modifier,
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u32 range_list)
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{
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struct mp_exten_compatibility_address_space *mpe;
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mpe = smp_next_mpe_entry(mc);
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@ -46,35 +46,35 @@
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struct intel_mp_floating
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{
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char mpf_signature[4]; /* "_MP_" */
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unsigned long mpf_physptr; /* Configuration table address */
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unsigned char mpf_length; /* Our length (paragraphs) */
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unsigned char mpf_specification;/* Specification version */
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unsigned char mpf_checksum; /* Checksum (makes sum 0) */
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unsigned char mpf_feature1; /* Standard or configuration ? */
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unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
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u32 mpf_physptr; /* Configuration table address */
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u8 mpf_length; /* Our length (paragraphs) */
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u8 mpf_specification;/* Specification version */
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u8 mpf_checksum; /* Checksum (makes sum 0) */
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u8 mpf_feature1; /* Predefined or Unique configuration? */
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u8 mpf_feature2; /* Bit7 set for IMCR/PIC */
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#define MP_FEATURE_VIRTUALWIRE (0 << 7)
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#define MP_FEATURE_PIC (1 << 7)
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unsigned char mpf_feature3; /* Unused (0) */
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unsigned char mpf_feature4; /* Unused (0) */
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unsigned char mpf_feature5; /* Unused (0) */
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u8 mpf_feature3; /* Unused (0) */
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u8 mpf_feature4; /* Unused (0) */
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u8 mpf_feature5; /* Unused (0) */
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} __attribute__((packed));
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struct mp_config_table
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{
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char mpc_signature[4];
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#define MPC_SIGNATURE "PCMP"
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unsigned short mpc_length; /* Size of table */
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char mpc_spec; /* 0x01 */
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char mpc_checksum;
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u16 mpc_length; /* Size of table */
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u8 mpc_spec; /* 0x01 */
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u8 mpc_checksum;
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char mpc_oem[8];
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char mpc_productid[12];
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unsigned long mpc_oemptr; /* 0 if not present */
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unsigned short mpc_oemsize; /* 0 if not present */
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unsigned short mpc_entry_count;
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unsigned long mpc_lapic; /* APIC address */
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unsigned short mpe_length; /* Extended Table size */
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unsigned char mpe_checksum; /* Extended Table checksum */
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unsigned char reserved;
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u32 mpc_oemptr; /* 0 if not present */
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u16 mpc_oemsize; /* 0 if not present */
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u16 mpc_entry_count;
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u32 mpc_lapic; /* APIC address */
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u16 mpe_length; /* Extended Table size */
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u8 mpe_checksum; /* Extended Table checksum */
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u8 reserved;
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} __attribute__((packed));
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/* Followed by entries */
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@ -87,25 +87,25 @@ struct mp_config_table
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struct mpc_config_processor
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{
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unsigned char mpc_type;
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unsigned char mpc_apicid; /* Local APIC number */
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unsigned char mpc_apicver; /* Its versions */
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unsigned char mpc_cpuflag;
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u8 mpc_type;
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u8 mpc_apicid; /* Local APIC number */
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u8 mpc_apicver; /* Its versions */
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u8 mpc_cpuflag;
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#define MPC_CPU_ENABLED 1 /* Processor is available */
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#define MPC_CPU_BOOTPROCESSOR 2 /* Processor is the BP */
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unsigned long mpc_cpufeature;
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u32 mpc_cpufeature;
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#define MPC_CPU_STEPPING_MASK 0x0F
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#define MPC_CPU_MODEL_MASK 0xF0
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#define MPC_CPU_FAMILY_MASK 0xF00
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unsigned long mpc_featureflag; /* CPUID feature value */
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unsigned long mpc_reserved[2];
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u32 mpc_featureflag; /* CPUID feature value */
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u32 mpc_reserved[2];
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} __attribute__((packed));
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struct mpc_config_bus
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{
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unsigned char mpc_type;
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unsigned char mpc_busid;
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unsigned char mpc_bustype[6];
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u8 mpc_type;
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u8 mpc_busid;
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u8 mpc_bustype[6];
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} __attribute__((packed));
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#define BUSTYPE_EISA "EISA"
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@ -118,23 +118,23 @@ struct mpc_config_bus
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struct mpc_config_ioapic
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{
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unsigned char mpc_type;
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unsigned char mpc_apicid;
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unsigned char mpc_apicver;
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unsigned char mpc_flags;
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u8 mpc_type;
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u8 mpc_apicid;
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u8 mpc_apicver;
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u8 mpc_flags;
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#define MPC_APIC_USABLE 0x01
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unsigned long mpc_apicaddr;
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u32 mpc_apicaddr;
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} __attribute__((packed));
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struct mpc_config_intsrc
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{
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unsigned char mpc_type;
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unsigned char mpc_irqtype;
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unsigned short mpc_irqflag;
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unsigned char mpc_srcbus;
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unsigned char mpc_srcbusirq;
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unsigned char mpc_dstapic;
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unsigned char mpc_dstirq;
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u8 mpc_type;
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u8 mpc_irqtype;
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u16 mpc_irqflag;
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u8 mpc_srcbus;
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u8 mpc_srcbusirq;
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u8 mpc_dstapic;
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u8 mpc_dstirq;
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} __attribute__((packed));
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enum mp_irq_source_types {
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@ -156,14 +156,14 @@ enum mp_irq_source_types {
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struct mpc_config_lintsrc
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{
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unsigned char mpc_type;
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unsigned char mpc_irqtype;
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unsigned short mpc_irqflag;
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unsigned char mpc_srcbusid;
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unsigned char mpc_srcbusirq;
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unsigned char mpc_destapic;
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u8 mpc_type;
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u8 mpc_irqtype;
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u16 mpc_irqflag;
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u8 mpc_srcbusid;
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u8 mpc_srcbusirq;
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u8 mpc_destapic;
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#define MP_APIC_ALL 0xFF
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unsigned char mpc_destapiclint;
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u8 mpc_destapiclint;
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} __attribute__((packed));
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/*
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@ -194,44 +194,44 @@ enum mp_bustype {
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#define MPE_COMPATIBILITY_ADDRESS_SPACE 0x82
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struct mp_exten_config {
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unsigned char mpe_type;
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unsigned char mpe_length;
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u8 mpe_type;
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u8 mpe_length;
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} __attribute__((packed));
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typedef struct mp_exten_config *mpe_t;
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struct mp_exten_system_address_space {
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unsigned char mpe_type;
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unsigned char mpe_length;
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unsigned char mpe_busid;
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unsigned char mpe_address_type;
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u8 mpe_type;
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u8 mpe_length;
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u8 mpe_busid;
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u8 mpe_address_type;
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#define ADDRESS_TYPE_IO 0
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#define ADDRESS_TYPE_MEM 1
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#define ADDRESS_TYPE_PREFETCH 2
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unsigned int mpe_address_base_low;
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unsigned int mpe_address_base_high;
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unsigned int mpe_address_length_low;
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unsigned int mpe_address_length_high;
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u32 mpe_address_base_low;
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u32 mpe_address_base_high;
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u32 mpe_address_length_low;
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u32 mpe_address_length_high;
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} __attribute__((packed));
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struct mp_exten_bus_hierarchy {
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unsigned char mpe_type;
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unsigned char mpe_length;
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unsigned char mpe_busid;
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unsigned char mpe_bus_info;
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u8 mpe_type;
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u8 mpe_length;
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u8 mpe_busid;
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u8 mpe_bus_info;
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||||
#define BUS_SUBTRACTIVE_DECODE 1
|
||||
unsigned char mpe_parent_busid;
|
||||
unsigned char reserved[3];
|
||||
u8 mpe_parent_busid;
|
||||
u8 reserved[3];
|
||||
} __attribute__((packed));
|
||||
|
||||
struct mp_exten_compatibility_address_space {
|
||||
unsigned char mpe_type;
|
||||
unsigned char mpe_length;
|
||||
unsigned char mpe_busid;
|
||||
unsigned char mpe_address_modifier;
|
||||
u8 mpe_type;
|
||||
u8 mpe_length;
|
||||
u8 mpe_busid;
|
||||
u8 mpe_address_modifier;
|
||||
#define ADDRESS_RANGE_SUBTRACT 1
|
||||
#define ADDRESS_RANGE_ADD 0
|
||||
unsigned int mpe_range_list;
|
||||
u32 mpe_range_list;
|
||||
#define RANGE_LIST_IO_ISA 0
|
||||
/* X100 - X3FF
|
||||
* X500 - X7FF
|
||||
|
|
@ -251,40 +251,40 @@ struct mp_exten_compatibility_address_space {
|
|||
} __attribute__((packed));
|
||||
|
||||
void mptable_init(struct mp_config_table *mc, u32 lapic_addr);
|
||||
|
||||
void *smp_next_mpc_entry(struct mp_config_table *mc);
|
||||
void *smp_next_mpe_entry(struct mp_config_table *mc);
|
||||
|
||||
void smp_write_processor(struct mp_config_table *mc,
|
||||
unsigned char apicid, unsigned char apicver,
|
||||
unsigned char cpuflag, unsigned int cpufeature,
|
||||
unsigned int featureflag);
|
||||
u8 apicid, u8 apicver,
|
||||
u8 cpuflag, u32 cpufeature,
|
||||
u32 featureflag);
|
||||
void smp_write_processors(struct mp_config_table *mc);
|
||||
void smp_write_ioapic(struct mp_config_table *mc,
|
||||
unsigned char id, unsigned char ver,
|
||||
unsigned long apicaddr);
|
||||
u8 id, u8 ver, u32 apicaddr);
|
||||
void smp_write_intsrc(struct mp_config_table *mc,
|
||||
unsigned char irqtype, unsigned short irqflag,
|
||||
unsigned char srcbus, unsigned char srcbusirq,
|
||||
unsigned char dstapic, unsigned char dstirq);
|
||||
u8 irqtype, u16 irqflag, u8 srcbus, u8 srcbusirq,
|
||||
u8 dstapic, u8 dstirq);
|
||||
void smp_write_pci_intsrc(struct mp_config_table *mc,
|
||||
u8 irqtype, u8 srcbus, u8 dev, u8 pirq,
|
||||
u8 dstapic, u8 dstirq);
|
||||
void smp_write_intsrc_pci_bridge(struct mp_config_table *mc,
|
||||
unsigned char irqtype, unsigned short irqflag,
|
||||
u8 irqtype, u16 irqflag,
|
||||
struct device *dev,
|
||||
unsigned char dstapic, unsigned char *dstirq);
|
||||
void smp_write_lintsrc(struct mp_config_table *mc,
|
||||
unsigned char irqtype, unsigned short irqflag,
|
||||
unsigned char srcbusid, unsigned char srcbusirq,
|
||||
unsigned char destapic, unsigned char destapiclint);
|
||||
u8 irqtype, u16 irqflag,
|
||||
u8 srcbusid, u8 srcbusirq,
|
||||
u8 destapic, u8 destapiclint);
|
||||
void smp_write_address_space(struct mp_config_table *mc,
|
||||
unsigned char busid, unsigned char address_type,
|
||||
unsigned int address_base_low, unsigned int address_base_high,
|
||||
unsigned int address_length_low, unsigned int address_length_high);
|
||||
u8 busid, u8 address_type,
|
||||
u32 address_base_low, u32 address_base_high,
|
||||
u32 address_length_low, u32 address_length_high);
|
||||
void smp_write_bus_hierarchy(struct mp_config_table *mc,
|
||||
unsigned char busid, unsigned char bus_info,
|
||||
unsigned char parent_busid);
|
||||
u8 busid, u8 bus_info,
|
||||
u8 parent_busid);
|
||||
void smp_write_compatibility_address_space(struct mp_config_table *mc,
|
||||
unsigned char busid, unsigned char address_modifier,
|
||||
unsigned int range_list);
|
||||
u8 busid, u8 address_modifier,
|
||||
u32 range_list);
|
||||
void *smp_write_floating_table(unsigned long addr, unsigned int virtualwire);
|
||||
unsigned long write_smp_table(unsigned long addr);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue