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soc/baytrail: hook up smmstore 

Adapted from implementation in sb/intel/common.

Test: build/boot variants of google/rambi with Tianocore
and SMMSTORE enabled

Change-Id: Id8adeda982feba1cbcf5e04cf0bef0a6710ad4f0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39190
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2018-12-25 21:54:52 -06:00 committed by Patrick Georgi
parent 73704533d6
commit bd6bdc5c1d
1 changed files with 25 additions and 0 deletions
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25
src/soc/intel/baytrail/smihandler.c
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@ -24,6 +24,7 @@
#include <elog.h>
#include <halt.h>
#include <spi-generic.h>
#include <smmstore.h>
#include <soc/iosf.h>
#include <soc/pci_devs.h>
@ -282,6 +283,26 @@ static void soc_legacy(void)
LPSS_ACPI_MODE_DISABLE(SPI);
}
static void southbridge_smi_store(void)
{
u8 sub_command, ret;
em64t100_smm_state_save_area_t *io_smi =
smi_apmc_find_state_save(APM_CNT_SMMSTORE);
uint32_t reg_ebx;
if (!io_smi)
return;
/* Command and return value in EAX */
sub_command = (io_smi->rax >> 8) & 0xff;
/* Parameter buffer in EBX */
reg_ebx = io_smi->rbx;
/* drivers/smmstore/smi.c */
ret = smmstore_exec(sub_command, (void *)reg_ebx);
io_smi->rax = ret;
}
static void southbridge_smi_apmc(void)
{
uint8_t reg8;
@ -334,6 +355,10 @@ static void southbridge_smi_apmc(void)
case APM_CNT_LEGACY:
soc_legacy();
break;
case APM_CNT_SMMSTORE:
if (CONFIG(SMMSTORE))
southbridge_smi_store();
break;
}
mainboard_smi_apmc(reg8);