soc/intel/skylake: Restore alphabetical order of Kconfig selects

Built clevo/n130wu with BUILD_TIMELESS=1, coreboot.rom remains
identical.

Change-Id: I6a5c694a9686a5435aa5c64647286a6017f9aa13
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48376
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2020-12-06 11:32:25 +01:00 committed by Michael Niewöhner
parent ad50856719
commit bd7020d68c
1 changed files with 4 additions and 4 deletions

View File

@ -30,20 +30,20 @@ config CPU_SPECIFIC_OPTIONS
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_FSP_LOGO_SUPPORT
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_INTEL_FSP_REPO
select HAVE_SMI_HANDLER
select INTEL_DESCRIPTOR_MODE_CAPABLE
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select HAVE_INTEL_FSP_REPO
select IOAPIC
select MRC_SETTINGS_PROTECT
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select REG_SCRIPT
select SA_ENABLE_DPR
select PM_ACPI_TIMER_OPTIONAL
select PMC_GLOBAL_RESET_ENABLE_LOCK
select REG_SCRIPT
select SA_ENABLE_DPR
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK