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mb/foxconn/g41m: Fix overridetree 

The .chip_info field of PNP devices in overridetree
incorrectly pointed to southbridge config structure
in generated static.c files.

Change-Id: If507c8ea9c865ff86e127226b93a8579bcf39d8d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2019-03-16 19:56:40 +02:00
parent ade13f03e1
commit bd74aaf534
1 changed files with 8 additions and 6 deletions
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14
src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb
View File

@ -3,13 +3,15 @@ chip northbridge/intel/x4x # Northbridge
subsystemid 0x105b 0x0dc0 inherit
chip southbridge/intel/i82801gx # Southbridge
device pci 1f.0 on # ISA bridge
device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
chip superio/ite/it8720f # Super I/O
device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 2e.2 off end # COM2 (IR)
device pnp 2e.a off end # CIR
end
device pnp 2e.2 off end # COM2 (IR)
device pnp 2e.a off end # CIR
end
device pci 1f.1 on end # PATA/IDE
end