google/drallion: Fix build issue due to recent merge

One case slipped past the review and rebase of 733c28fa42
(soc/intel/{cnl,icl}: Use new power-failure-state API).

Change-Id: Id01df30d10e202e9672bf5be799a84f4f202fe24
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34812
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/drallion/chromeos.c

@@ -122,6 +122,6 @@ void mainboard_prepare_cr50_reset(void)
 {
 #if ENV_RAMSTAGE
 	/* Ensure system powers up after CR50 reset */
-	pmc_set_afterg3(MAINBOARD_POWER_STATE_ON);
+	pmc_soc_set_afterg3_en(true);
 #endif
 }