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intel/kunimitsu: Add device properties for Nuvoton codec 

This patch added default values for two SAR properies
introduced by updated nau8825 codec driver. Also updated
sar-threshold to improve button detection accuracy.

Bug=chrome-os-partner:49394
BRANCH=glados
TEST=Build for kunimitsu. Tested with 4-button headset

Change-Id: I4096c60be54819d0ab2bf4b72a1e403f88d96af0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4b747e9dffed1c51131f0028879d4c22283c8ec5
Original-Change-Id: I3e222ff58c1483e261acf1cea297164966bf8689
Original-Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Original-Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/322241
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13014
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Yong Zhi 2016-01-13 15:21:00 -08:00 committed by Patrick Georgi
parent b7090ee1d0
commit bdab9f787c
1 changed files with 3 additions and 1 deletions
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4
src/mainboard/intel/kunimitsu/acpi/mainboard.asl
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@ -208,7 +208,7 @@ Scope (\_SB.PCI0.I2C4)
*/
Package () { "nuvoton,sar-threshold-num", 4 },
Package () { "nuvoton,sar-threshold",
Package() { 0x0a, 0x14, 0x26, 0x73 } },
Package() { 0x08, 0x12, 0x26, 0x73 } },
/*
* Coeff 0-15 used to adjust threshold level
* 0 for low resist range
@ -216,6 +216,8 @@ Scope (\_SB.PCI0.I2C4)
Package () { "nuvoton,sar-hysteresis", 0 },
/* SAR tracking gain based on 2.754 micbias-voltage */
Package () { "nuvoton,sar-voltage", 6 },
Package () { "nuvoton,sar-compare-time", 1 },
Package () { "nuvoton,sar-sampling-time", 1 },
/* 100ms short key press debounce */
Package () { "nuvoton,short-key-debounce", 3 },
/* 2^(7+2) = 512 ms insert/eject debounce */