arch/io.h: Add missing includes

Fixes indirect includes that would break with followup work.

Change-Id: I37ca01b904a0b422a4d09475377e755e167a6ab3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31697
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/include/cpu/amd/vr.h

@@ -8,6 +8,7 @@
 #define CPU_AMD_VR_H
 
 #include <stdint.h>
+#include <arch/io.h>
 
 #define VRC_INDEX				0xAC1C	// Index register
 #define VRC_DATA				0xAC1E	// Data register

src/mainboard/asus/kfsn4-dre/bootblock.c

@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <pc80/mc146818rtc.h>
 
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p3b-f/romstage.c

@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <device/pci_def.h>
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>

src/mainboard/google/poppy/variants/nautilus/mainboard.c

@@ -15,6 +15,7 @@
 
 #include <baseboard/variants.h>
 #include <chip.h>
+#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>

src/mainboard/hp/dl165_g6_fam10/bootblock.c

@@ -11,6 +11,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <device/pnp_def.h>
 
 #define SCH4307_CONFIG_PORT     0x162e

src/mainboard/kontron/986lcd-m/romstage.c

@@ -17,6 +17,7 @@
 
 #include <stdint.h>
 #include <halt.h>
+#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/intel/romstage.h>
 #include <cpu/x86/bist.h>

src/mainboard/lenovo/t60/mainboard.c

@@ -16,6 +16,7 @@
  */
 
 #include <device/pci_def.h>
+#include <arch/io.h>
 #include <device/device.h>
 #include <ec/lenovo/pmh7/pmh7.h>
 #include <ec/lenovo/h8/h8.h>

src/mainboard/lenovo/z61t/mainboard.c

@@ -16,6 +16,7 @@
  */
 
 #include <device/pci_def.h>
+#include <arch/io.h>
 #include <device/device.h>
 #include <ec/lenovo/pmh7/pmh7.h>
 #include <ec/lenovo/h8/h8.h>

src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <bootstate.h>
 #include <cf9_reset.h>
 #include <console/console.h>

src/northbridge/amd/amdfam10/setup_resource_map.c

@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <inttypes.h>
 #include <console/console.h>
 #include <device/pci_ops.h>

src/northbridge/amd/amdmct/mct_ddr3/mport_d.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <inttypes.h>
 #include <string.h>
 #include "mct_d.h"

src/northbridge/intel/pineview/romstage.c

@@ -17,6 +17,7 @@
  * so this one is named with prefix mainboard.
  */
 
+#include <arch/io.h>
 #include <lib.h>
 #include <timestamp.h>
 #include <console/console.h>

src/soc/amd/stoneyridge/smihandler.c

@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <cpu/x86/cache.h>

src/soc/intel/braswell/lpc_init.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <soc/gpio.h>
 #include <soc/pm.h>
 #include <soc/iomap.h>

src/soc/intel/common/block/smbus/smbus.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <device/device.h>
 #include <device/path.h>
 #include <device/smbus.h>

src/soc/intel/denverton_ns/romstage.c

@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <cbmem.h>
 #include <cf9_reset.h>
 #include <console/console.h>

src/soc/intel/quark/reg_access.c

@@ -15,6 +15,7 @@
 
 #define __SIMPLE_DEVICE__
 
+#include <arch/io.h>
 #include <assert.h>
 #include <cpu/x86/mtrr.h>
 #include <console/console.h>

src/southbridge/amd/agesa/hudson/smihandler.c

@@ -18,6 +18,7 @@
  * SMI handler for Hudson southbridges
  */
 
+#include <arch/io.h>
 #include "hudson.h"
 #include "smi.h"
 

src/southbridge/amd/pi/hudson/smihandler.c

@@ -18,6 +18,7 @@
  * SMI handler for Hudson southbridges
  */
 
+#include <arch/io.h>
 #include "hudson.h"
 #include "smi.h"
 

src/southbridge/amd/sb700/smbus.c

@@ -16,6 +16,7 @@
 #ifndef _SB700_SMBUS_C_
 #define _SB700_SMBUS_C_
 
+#include <arch/io.h>
 #include "smbus.h"
 
 extern uint8_t amd_sb700_aux_smbus;

src/southbridge/amd/sb800/smbus.c

@@ -16,6 +16,7 @@
 #ifndef _SB800_SMBUS_C_
 #define _SB800_SMBUS_C_
 
+#include <arch/io.h>
 #include "smbus.h"
 
 static int smbus_wait_until_ready(u32 smbus_io_base)