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soc/intel/baytrail/northcluster.c: Clean up comments 

Giant commit aee7ab2 (soc/intel/braswell: Clean up) reformatted comments
to follow the coding style, among many other things. This commit updates
some comments on Bay Trail with two objectives: follow the coding style,
and reduce the differences between Bay Trail and Braswell.

Tested with BUILD_TIMELESS=1, Google Ninja remains identical.

Change-Id: Ibe942a20c624e2c74801c8816616ec83851949af
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Angel Pons 2020-07-26 22:41:43 +02:00
parent c3be055fbe
commit bdd3d5f3de
1 changed files with 6 additions and 3 deletions
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9
src/soc/intel/baytrail/northcluster.c
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@ -101,14 +101,17 @@ static void nc_read_resources(struct device *dev)
bmbound_k = RES_IN_KiB(nc_read_top_of_low_memory());
mmio_resource(dev, index++, smmrrh, bmbound_k - smmrrh);
/* The BMBOUND_HI register matches register bits of 31:24 with address
* bits of 35:28. Therefore, shift register to align properly. */
/*
* The BMBOUND_HI register matches register bits of 31:24 with address
* bits of 35:28. Therefore, shift register to align properly.
*/
bmbound_hi = iosf_bunit_read(BUNIT_BMBOUND_HI) & ~((1 << 24) - 1);
bmbound_hi = RES_IN_KiB(bmbound_hi) << 4;
if (bmbound_hi > four_gig_kib)
ram_resource(dev, index++, four_gig_kib, bmbound_hi - four_gig_kib);
/* Reserve everything between A segment and 1MB:
/*
* Reserve everything between A segment and 1MB:
*
* 0xa0000 - 0xbffff: legacy VGA
* 0xc0000 - 0xfffff: RAM