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soc/apollolake/lpc_lib: Add utility to configure LPC pads 

Change-Id: Iaf325863681ad9b8b5d7662a9d267488b8fdf008
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/14587
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Alexandru Gagniuc 2016-04-28 10:38:05 -07:00 committed by Martin Roth
parent e237f8b766
commit bdd921c772
2 changed files with 18 additions and 0 deletions
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2
src/soc/intel/apollolake/include/soc/lpc.h
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@ -53,6 +53,8 @@
#define LGMR_EN (1 << 0)
#define LGMR_WINDOW_SIZE (64 * KiB)
/* Configure the SOC's LPC pads and mux them to the LPC function. */
void lpc_configure_pads(void);
/* Enable fixed IO ranges to LPC. IOE_* macros can be OR'ed together. */
void lpc_enable_fixed_io_ranges(uint16_t io_enables);
/* Open a generic IO window to the LPC bus. Four windows are available. */

16
src/soc/intel/apollolake/lpc_lib.c
View File

@ -20,6 +20,7 @@
#include <console/console.h>
#include <device/pci.h>
#include <lib.h>
#include <soc/gpio.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
@ -44,6 +45,21 @@ static const struct lpc_mmio_range {
{ 0, 0 }
};
static const struct pad_config lpc_gpios[] = {
PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1),
PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1),
PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1),
PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1),
PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1),
PAD_CFG_NF(LPC_CLKOUT0, UP_20K, DEEP, NF1),
PAD_CFG_NF(LPC_CLKOUT1, UP_20K, DEEP, NF1)
};
void lpc_configure_pads(void)
{
gpio_configure_pads(lpc_gpios, ARRAY_SIZE(lpc_gpios));
}
void lpc_enable_fixed_io_ranges(uint16_t io_enables)
{
uint16_t reg_io_enables;