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libpayload: mips: correct platform ID 

BUG=chrome-os-partner:31438
TEST=tested on Pistachio bring up board; behaves as expected.
BRANCH=none

Change-Id: I8e5ac80e95b5169102eaa075bc22045c0789d486
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4afe332bcc41afeb7e31e918e345c3336f7dc604
Original-Change-Id: I55b788faf7984bafc2509cac69867a772c7cb863
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/241427
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/8745
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Ionela Voinescu 2015-01-19 02:41:49 +00:00 committed by Patrick Georgi
parent b29a67d8c8
commit bde2081e75
1 changed files with 9 additions and 2 deletions
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11
payloads/libpayload/include/mips/arch/cpu.h
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@ -22,8 +22,15 @@
* Reading at this address allows to identify the platform the code is running * Reading at this address allows to identify the platform the code is running
* on * on
*/ */
#define IMG_PLATFORM_ID() (*((unsigned *)0xB8149060))
#define IMG_PLATFORM_ID_SILICON 0xF00D0006 /*
* This register holds the FPGA image version
* If we're not working on the FPGA this will be 0
*/
#define PRIMARY_FPGA_VERSION 0xB8149060
#define IMG_PLATFORM_ID() read32(PRIMARY_FPGA_VERSION)
#define IMG_PLATFORM_ID_FPGA 0xD1400003 /* Last FPGA image */
#define IMG_PLATFORM_ID_SILICON 0
#define CP0_COUNT 9 #define CP0_COUNT 9
#define CP0_COMPARE 11 #define CP0_COMPARE 11