soc/intel/alderlake: Add HID for DPTF Battery Participant
HID is defined in Intel Dynamic Tuning revision 1.3.13 (Doc no: 541817) BUG=b:205928013 TEST=Build, boot brya0 and dump SSDT to check BAT1 device HID Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com> Change-Id: Ie1fff53f938a5f13423e360c24c7181fa7613492 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63316 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
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@ -14,6 +14,8 @@ static const struct dptf_platform_info adl_dptf_platform_info = {
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.tpch_device_hid = "INTC1049",
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.tpch_device_hid = "INTC1049",
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/* _HID for the toplevel TPWR device, typically \_SB.DPTF.TPWR */
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/* _HID for the toplevel TPWR device, typically \_SB.DPTF.TPWR */
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.tpwr_device_hid = "INTC1060",
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.tpwr_device_hid = "INTC1060",
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/* _HID for the toplevel BAT1 device, typically \_SB.DPTF.BAT1 */
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.tbat_device_hid = "INTC1061",
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.tpch_method_names = {
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.tpch_method_names = {
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.set_fivr_low_clock_method = "RFC0",
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.set_fivr_low_clock_method = "RFC0",
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