soc/intel/alderlake: Add HID for DPTF Battery Participant

HID is defined in Intel Dynamic Tuning revision 1.3.13 (Doc no: 541817)

BUG=b:205928013
TEST=Build, boot brya0 and dump SSDT to check BAT1 device HID

Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com>
Change-Id: Ie1fff53f938a5f13423e360c24c7181fa7613492
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63316
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Varshit B Pandya 2022-04-02 15:26:23 +05:30 committed by Felix Held
parent 170a76caa7
commit be1a050772
1 changed files with 2 additions and 0 deletions

View File

@ -14,6 +14,8 @@ static const struct dptf_platform_info adl_dptf_platform_info = {
.tpch_device_hid = "INTC1049", .tpch_device_hid = "INTC1049",
/* _HID for the toplevel TPWR device, typically \_SB.DPTF.TPWR */ /* _HID for the toplevel TPWR device, typically \_SB.DPTF.TPWR */
.tpwr_device_hid = "INTC1060", .tpwr_device_hid = "INTC1060",
/* _HID for the toplevel BAT1 device, typically \_SB.DPTF.BAT1 */
.tbat_device_hid = "INTC1061",
.tpch_method_names = { .tpch_method_names = {
.set_fivr_low_clock_method = "RFC0", .set_fivr_low_clock_method = "RFC0",