soc/intel/cannonlake: select SOC_INTEL_COMMON_BLOCK_DTT

Select this at the SoC level (like other modern Intel SoCs), and drop
it from individual boards which selected it.

Change-Id: I838ada7dfe948c58a5bb9805ade289b07368aa63
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>

src/mainboard/google/hatch/Kconfig

@@ -26,7 +26,6 @@ config BOARD_GOOGLE_BASEBOARD_HATCH
 	select MAINBOARD_HAS_TPM2
 	select MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE
 	select SOC_INTEL_COMETLAKE_1
-	select SOC_INTEL_COMMON_BLOCK_DTT
 	select SPI_TPM
 	select SYSTEM_TYPE_LAPTOP
 	select TPM_GOOGLE_CR50

src/mainboard/google/puff/Kconfig

@@ -31,7 +31,6 @@ config BOARD_GOOGLE_BASEBOARD_PUFF
 	select RT8168_GET_MAC_FROM_VPD
 	select RT8168_SET_LED_MODE
 	select SOC_INTEL_COMETLAKE_1
-	select SOC_INTEL_COMMON_BLOCK_DTT
 	select SOC_INTEL_CSE_LITE_SKU
 	select SPD_CACHE_IN_FMAP
 	select SPD_READ_BY_WORD

src/soc/intel/cannonlake/Kconfig

@@ -46,6 +46,7 @@ config SOC_INTEL_CANNONLAKE_BASE
 	select SOC_INTEL_COMMON_BLOCK_CPU
 	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
 	select SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE
+	select SOC_INTEL_COMMON_BLOCK_DTT
 	select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
 	select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
 	select SOC_INTEL_COMMON_BLOCK_HDA