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soc/amd/common/block/espi: use lower case hex digits in definitions 

coreboot uses lower case hex digits instead of upper case ones.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0955db7afd101ab522845d5911ff971408e520e3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60769
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2022-01-04 20:43:23 +01:00
parent 5ba87a8092
commit beaef09a9b
2 changed files with 8 additions and 8 deletions
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2
src/soc/amd/common/block/include/amdblocks/espi.h
View File

@ -21,7 +21,7 @@
#define ESPI_MMIO_BASE_OFFSET_REG0 0x50
#define ESPI_MMIO_BASE_OFFSET_REG1 0x54
#define ESPI_MMIO_BASE_OFFSET_REG2 0x58
#define ESPI_MMIO_BASE_OFFSET_REG3 0x5C
#define ESPI_MMIO_BASE_OFFSET_REG3 0x5c
#define ESPI_MMIO_OFFSET_SIZE_REG0 0x60
#define ESPI_MMIO_OFFSET_SIZE_REG1 0x64

14
src/soc/amd/common/block/lpc/espi_util.c
View File

@ -336,9 +336,9 @@ enum espi_cmd_type {
#define ESPI_GLOBAL_CONTROL_0 0x30
#define ESPI_WAIT_CNT_SHIFT 24
#define ESPI_WAIT_CNT_MASK (0x3F << ESPI_WAIT_CNT_SHIFT)
#define ESPI_WAIT_CNT_MASK (0x3f << ESPI_WAIT_CNT_SHIFT)
#define ESPI_WDG_CNT_SHIFT 8
#define ESPI_WDG_CNT_MASK (0xFFFF << ESPI_WDG_CNT_SHIFT)
#define ESPI_WDG_CNT_MASK (0xffff << ESPI_WDG_CNT_SHIFT)
#define ESPI_AL_IDLE_TIMER_SHIFT 4
#define ESPI_AL_IDLE_TIMER_MASK (0x7 << ESPI_AL_IDLE_TIMER_SHIFT)
#define ESPI_AL_STOP_EN (1 << 3)
@ -348,20 +348,20 @@ enum espi_cmd_type {
#define ESPI_GLOBAL_CONTROL_1 0x34
#define ESPI_RGCMD_INT_MAP_SHIFT 13
#define ESPI_RGCMD_INT_MAP_MASK (0x1F << ESPI_RGCMD_INT_MAP_SHIFT)
#define ESPI_RGCMD_INT_MAP_MASK (0x1f << ESPI_RGCMD_INT_MAP_SHIFT)
#define ESPI_RGCMD_INT(irq) ((irq) << ESPI_RGCMD_INT_MAP_SHIFT)
#define ESPI_RGCMD_INT_SMI (0x1F << ESPI_RGCMD_INT_MAP_SHIFT)
#define ESPI_RGCMD_INT_SMI (0x1f << ESPI_RGCMD_INT_MAP_SHIFT)
#define ESPI_ERR_INT_MAP_SHIFT 8
#define ESPI_ERR_INT_MAP_MASK (0x1F << ESPI_ERR_INT_MAP_SHIFT)
#define ESPI_ERR_INT_MAP_MASK (0x1f << ESPI_ERR_INT_MAP_SHIFT)
#define ESPI_ERR_INT(irq) ((irq) << ESPI_ERR_INT_MAP_SHIFT)
#define ESPI_ERR_INT_SMI (0x1F << ESPI_ERR_INT_MAP_SHIFT)
#define ESPI_ERR_INT_SMI (0x1f << ESPI_ERR_INT_MAP_SHIFT)
#define ESPI_SUB_DECODE_SLV_SHIFT 3
#define ESPI_SUB_DECODE_SLV_MASK (0x3 << ESPI_SUB_DECODE_SLV_SHIFT)
#define ESPI_SUB_DECODE_EN (1 << 2)
#define ESPI_BUS_MASTER_EN (1 << 1)
#define ESPI_SW_RST (1 << 0)
#define ESPI_SLAVE0_INT_EN 0x6C
#define ESPI_SLAVE0_INT_EN 0x6c
#define ESPI_SLAVE0_INT_STS 0x70
#define ESPI_STATUS_DNCMD_COMPLETE (1 << 28)
#define ESPI_STATUS_NON_FATAL_ERROR (1 << 6)