x86: use boot state callbacks to disable rom cache
On x86 systems there is a concept of cachings the ROM. However, the typical policy is that the boot cpu is the only one with it enabled. In order to ensure the MTRRs are the same across cores the rom cache needs to be disabled prior to OS resume or boot handoff. Therefore, utilize the boot state callbacks to schedule the disabling of the ROM cache at the ramstage exit points. Change-Id: I4da5886d9f1cf4c6af2f09bb909f0d0f0faa4e62 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/3138 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -637,9 +637,6 @@ void acpi_resume(void *wake_vec)
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/* Call mainboard resume handler first, if defined. */
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/* Call mainboard resume handler first, if defined. */
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if (mainboard_suspend_resume)
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if (mainboard_suspend_resume)
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mainboard_suspend_resume();
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mainboard_suspend_resume();
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/* Tear down the caching of the ROM. */
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if (disable_cache_rom)
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disable_cache_rom();
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post_code(POST_OS_RESUME);
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post_code(POST_OS_RESUME);
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acpi_jump_to_wakeup(wake_vec);
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acpi_jump_to_wakeup(wake_vec);
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@ -27,6 +27,7 @@
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#include <stddef.h>
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <string.h>
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#include <string.h>
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#include <bootstate.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <cpu/cpu.h>
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#include <cpu/cpu.h>
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@ -408,10 +409,17 @@ void x86_mtrr_disable_rom_caching(void)
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enable_cache();
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enable_cache();
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}
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}
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void disable_cache_rom(void)
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static void disable_cache_rom(void *unused)
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{
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{
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x86_mtrr_disable_rom_caching();
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x86_mtrr_disable_rom_caching();
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}
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}
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BOOT_STATE_INIT_ENTRIES(disable_rom_cache_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
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disable_cache_rom, NULL),
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
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disable_cache_rom, NULL),
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};
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#endif
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#endif
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struct var_mtrr_state {
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struct var_mtrr_state {
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@ -9,9 +9,6 @@ struct bus;
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void initialize_cpus(struct bus *cpu_bus);
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void initialize_cpus(struct bus *cpu_bus);
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void asmlinkage secondary_cpu_init(unsigned int cpu_index);
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void asmlinkage secondary_cpu_init(unsigned int cpu_index);
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/* If a ROM cache was set up disable it before jumping to the payload or OS. */
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void __attribute__((weak)) disable_cache_rom(void);
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#if CONFIG_HAVE_SMI_HANDLER
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#if CONFIG_HAVE_SMI_HANDLER
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void smm_init(void);
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void smm_init(void);
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void smm_lock(void);
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void smm_lock(void);
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@ -537,10 +537,6 @@ int selfboot(struct lb_memory *mem, struct cbfs_payload *payload)
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timestamp_add_now(TS_SELFBOOT_JUMP);
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timestamp_add_now(TS_SELFBOOT_JUMP);
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#endif
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#endif
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/* Tear down the caching of the ROM. */
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if (disable_cache_rom)
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disable_cache_rom();
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/* Before we go off to run the payload, see if
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/* Before we go off to run the payload, see if
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* we stayed within our bounds.
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* we stayed within our bounds.
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*/
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*/
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