x86: use boot state callbacks to disable rom cache

On x86 systems there is a concept of cachings the ROM. However,
the typical policy is that the boot cpu is the only one with
it enabled. In order to ensure the MTRRs are the same across cores
the rom cache needs to be disabled prior to OS resume or boot handoff.
Therefore, utilize the boot state callbacks to schedule the disabling
of the ROM cache at the ramstage exit points.

Change-Id: I4da5886d9f1cf4c6af2f09bb909f0d0f0faa4e62
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3138
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Aaron Durbin 2013-04-24 20:59:43 -05:00 committed by Ronald G. Minnich
parent 243aa44b74
commit bebf66909a
4 changed files with 9 additions and 11 deletions

View File

@ -637,9 +637,6 @@ void acpi_resume(void *wake_vec)
/* Call mainboard resume handler first, if defined. */ /* Call mainboard resume handler first, if defined. */
if (mainboard_suspend_resume) if (mainboard_suspend_resume)
mainboard_suspend_resume(); mainboard_suspend_resume();
/* Tear down the caching of the ROM. */
if (disable_cache_rom)
disable_cache_rom();
post_code(POST_OS_RESUME); post_code(POST_OS_RESUME);
acpi_jump_to_wakeup(wake_vec); acpi_jump_to_wakeup(wake_vec);

View File

@ -27,6 +27,7 @@
#include <stddef.h> #include <stddef.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#include <bootstate.h>
#include <console/console.h> #include <console/console.h>
#include <device/device.h> #include <device/device.h>
#include <cpu/cpu.h> #include <cpu/cpu.h>
@ -408,10 +409,17 @@ void x86_mtrr_disable_rom_caching(void)
enable_cache(); enable_cache();
} }
void disable_cache_rom(void) static void disable_cache_rom(void *unused)
{ {
x86_mtrr_disable_rom_caching(); x86_mtrr_disable_rom_caching();
} }
BOOT_STATE_INIT_ENTRIES(disable_rom_cache_bscb) = {
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
disable_cache_rom, NULL),
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
disable_cache_rom, NULL),
};
#endif #endif
struct var_mtrr_state { struct var_mtrr_state {

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@ -9,9 +9,6 @@ struct bus;
void initialize_cpus(struct bus *cpu_bus); void initialize_cpus(struct bus *cpu_bus);
void asmlinkage secondary_cpu_init(unsigned int cpu_index); void asmlinkage secondary_cpu_init(unsigned int cpu_index);
/* If a ROM cache was set up disable it before jumping to the payload or OS. */
void __attribute__((weak)) disable_cache_rom(void);
#if CONFIG_HAVE_SMI_HANDLER #if CONFIG_HAVE_SMI_HANDLER
void smm_init(void); void smm_init(void);
void smm_lock(void); void smm_lock(void);

View File

@ -537,10 +537,6 @@ int selfboot(struct lb_memory *mem, struct cbfs_payload *payload)
timestamp_add_now(TS_SELFBOOT_JUMP); timestamp_add_now(TS_SELFBOOT_JUMP);
#endif #endif
/* Tear down the caching of the ROM. */
if (disable_cache_rom)
disable_cache_rom();
/* Before we go off to run the payload, see if /* Before we go off to run the payload, see if
* we stayed within our bounds. * we stayed within our bounds.
*/ */