src: Use include <delay.h> when appropriate

Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: David Guckian

src/drivers/aspeed/ast2050/ast2050.c

@@ -12,17 +12,15 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <delay.h>
+
 #include <stdlib.h>
 #include <arch/io.h>
 #include <edid.h>
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-
 #include <pc80/vga.h>
 
 #include "../common/aspeed_coreboot.h"

src/drivers/aspeed/common/ast_dp501.c

@@ -15,6 +15,8 @@
  * GNU General Public License for more details.
  */
 
+#include <delay.h>
+
 #include "ast_drv.h"
 
 static void send_ack(struct ast_private *ast)

src/drivers/aspeed/common/ast_main.c

@@ -26,8 +26,10 @@
 /*
  * Authors: Dave Airlie <airlied@redhat.com>
  */
-#include "ast_drv.h"
 
+#include <delay.h>
+
+#include "ast_drv.h"
 #include "ast_dram_tables.h"
 
 void ast_set_index_reg_mask(struct ast_private *ast,

src/drivers/aspeed/common/ast_post.c

@@ -29,8 +29,9 @@
 
 #define COREBOOT_AST_FAILOVER_TIMEOUT	10000000
 
-#include "ast_drv.h"
+#include <delay.h>
 
+#include "ast_drv.h"
 #include "ast_dram_tables.h"
 
 static void ast_init_dram_2300(struct drm_device *dev);

src/drivers/emulation/qemu/bochs.c

@@ -12,11 +12,9 @@
  */
 
 #include <stdint.h>
-#include <delay.h>
 #include <edid.h>
 #include <stdlib.h>
 #include <arch/io.h>
-
 #include <boot/coreboot_tables.h>
 #include <console/console.h>
 #include <device/device.h>

src/drivers/emulation/qemu/cirrus.c

@@ -15,17 +15,14 @@
  */
 
 #include <stdint.h>
-#include <delay.h>
 #include <edid.h>
 #include <stdlib.h>
-
 #include <boot/coreboot_tables.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-
 #include <pc80/vga.h>
 #include <pc80/vga_io.h>
 

src/drivers/intel/gma/intel_ddi.c

@@ -25,20 +25,19 @@
  *    Eugeni Dodonov <eugeni.dodonov@intel.com>
  *
  */
+
 #include <types.h>
 #include <stdlib.h>
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
-#include <delay.h>
 #include <arch/acpi.h>
 #include <arch/interrupt.h>
 #include <boot/coreboot_tables.h>
 #include <smbios.h>
 #include <device/pci.h>
 #include <ec/google/chromeec/ec.h>
-
 #include <cpu/x86/tsc.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mtrr.h>

src/drivers/intel/gma/vbt.c

@@ -16,7 +16,6 @@
  */
 
 #include <device/pci_ops.h>
-#include <delay.h>
 #include <device/device.h>
 #include <string.h>
 #include <device/pci.h>

src/drivers/net/ne2k.c

@@ -29,7 +29,6 @@ SMC8416 PIO support added by Andrew Bettison (andrewb@zip.com.au) on 4/3/02
 
 #include <arch/io.h>
 #include <console/ne2k.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>

src/drivers/siemens/nc_fpga/nc_fpga.c

@@ -19,9 +19,9 @@
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <hwilib.h>
 #include <bootstate.h>
+
 #include "nc_fpga.h"
 
 static void *nc_fpga_bar0;

src/drivers/sil/3114/sil_sata.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <stdlib.h>
 #include <console/console.h>
 #include <device/device.h>

src/drivers/spi/spi_flash.c

@@ -11,14 +11,13 @@
 #include <assert.h>
 #include <boot_device.h>
 #include <cpu/x86/smm.h>
-#include <delay.h>
 #include <stdlib.h>
 #include <string.h>
 #include <spi-generic.h>
 #include <spi_flash.h>
+#include <timer.h>
 
 #include "spi_flash_internal.h"
-#include <timer.h>
 
 static void spi_flash_addr(u32 addr, u8 *cmd)
 {

src/drivers/xgi/common/vb_init.c

@@ -17,14 +17,16 @@
  * GNU General Public License for more details.
  */
 
+#include <delay.h>
+
 #include "xgi_coreboot.h"
 #include "vstruct.h"
-
 #include "XGIfb.h"
 #include "vb_def.h"
 #include "vb_util.h"
 #include "vb_setmode.h"
 #include "vb_init.h"
+
 static const unsigned short XGINew_DDRDRAM_TYPE340[4][2] = {
 	{ 16, 0x45},
 	{  8, 0x35},

src/drivers/xgi/common/vb_setmode.c

@@ -14,11 +14,11 @@
  * GNU General Public License for more details.
  */
 
+#include <delay.h>
+
 #include "xgi_coreboot.h"
 #include "vstruct.h"
-
 #include "XGIfb.h"
-
 #include "vb_def.h"
 #include "vb_init.h"
 #include "vb_util.h"

src/drivers/xgi/common/xgi_coreboot.c

@@ -15,27 +15,23 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <delay.h>
+
 #include <stdlib.h>
 #include <vbe.h>
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-
 #include <pc80/vga.h>
 
 #include "xgi_coreboot.h"
 #include "vstruct.h"
-
 #include "XGIfb.h"
 #include "XGI_main.h"
 #include "vb_init.h"
 #include "vb_util.h"
 #include "vb_setmode.h"
-
 #include "XGI_main.c"
 
 static int xgi_vbe_valid;

src/drivers/xgi/common/xgi_coreboot.h

@@ -19,12 +19,10 @@
 #ifndef _XGI_COREBOOT_
 #define _XGI_COREBOOT_
 
-#include <delay.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <arch/io.h>
 #include <device/mmio.h>
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/drivers/xgi/z9s/z9s.c

@@ -12,9 +12,8 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <delay.h>
-#include <stdlib.h>
 
+#include <stdlib.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/ec/google/chromeec/crosec_proto.c

@@ -14,9 +14,9 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <stdint.h>
 #include <string.h>
+
 #include "ec.h"
 #include "ec_commands.h"
 #include "ec_message.h"

src/ec/google/chromeec/ec_i2c.c

@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/i2c_simple.h>
 #include <stdint.h>
 #include <string.h>

src/mainboard/apple/macbook21/mainboard.c

@@ -16,7 +16,6 @@
  */
 
 #include <device/device.h>
-#include <delay.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <arch/interrupt.h>
@@ -24,6 +23,7 @@
 #include <arch/acpigen.h>
 #include <drivers/intel/gma/int15.h>
 #include <ec/acpi/ec.h>
+
 #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
 
 static acpi_cstate_t cst_entries[] = {

src/mainboard/apple/macbook21/smihandler.c

@@ -18,7 +18,6 @@
 #include <cpu/x86/smm.h>
 #include <southbridge/intel/i82801gx/nvs.h>
 #include <southbridge/intel/common/pmutil.h>
-#include <delay.h>
 
 #define GPE_EC_SCI	12
 

src/mainboard/google/foster/mainboard.c

@@ -16,7 +16,6 @@
 
 #include <arch/mmu.h>
 #include <boot/coreboot_tables.h>
-#include <delay.h>
 #include <device/device.h>
 #include <memrange.h>
 #include <soc/addressmap.h>

src/mainboard/google/gale/mainboard.c

@@ -16,7 +16,6 @@
 
 #include <boardid.h>
 #include <boot/coreboot_tables.h>
-#include <delay.h>
 #include <device/device.h>
 #include <gpio.h>
 #include <soc/clock.h>

src/mainboard/google/oak/bootblock.c

@@ -15,7 +15,6 @@
 
 #include <boardid.h>
 #include <bootblock_common.h>
-#include <delay.h>
 #include <gpio.h>
 #include <device/mmio.h>
 #include <soc/gpio.h>

src/mainboard/google/slippy/variants/peppy/romstage.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <stdint.h>
 #include <stdlib.h>
 #include <string.h>

src/mainboard/google/slippy/variants/wolf/romstage.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <stdint.h>
 #include <stdlib.h>
 #include <string.h>

src/mainboard/google/smaug/romstage.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <soc/addressmap.h>
 #include <device/i2c_simple.h>
 #include <soc/clock.h>

src/mainboard/google/veyron/romstage.c

@@ -20,7 +20,6 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <program_loading.h>
 #include <soc/sdram.h>
 #include <soc/clock.h>

src/mainboard/google/veyron_mickey/mainboard.c

@@ -16,7 +16,6 @@
 #include <arch/cache.h>
 #include <device/mmio.h>
 #include <boot/coreboot_tables.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/i2c_simple.h>
 #include <edid.h>

src/mainboard/google/veyron_mickey/romstage.c

@@ -20,7 +20,6 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <program_loading.h>
 #include <soc/sdram.h>
 #include <soc/clock.h>

src/mainboard/google/veyron_rialto/mainboard.c

@@ -17,7 +17,6 @@
 #include <device/mmio.h>
 #include <boot/coreboot_tables.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/i2c_simple.h>
 #include <edid.h>

src/mainboard/google/veyron_rialto/romstage.c

@@ -20,7 +20,6 @@
 #include <assert.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include <delay.h>
 #include <program_loading.h>
 #include <soc/sdram.h>
 #include <soc/clock.h>

src/mainboard/hp/pavilion_m6_1035dx/mainboard_smi.c

@@ -18,16 +18,15 @@
  * SMI handler -- mostly takes care of SMIs from the EC
  */
 
-#include "ec.h"
-
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
-#include <delay.h>
 #include <ec/compal/ene932/ec.h>
 #include <southbridge/amd/agesa/hudson/hudson.h>
 #include <southbridge/amd/agesa/hudson/smi.h>
 
+#include "ec.h"
+
 #define ACPI_PM1_CNT_SLEEP(state) ((1 << 13) | (state & 0x7) << 10)
 
 enum sleep_states {

src/mainboard/intel/galileo/vboot.c

@@ -14,17 +14,17 @@
 
 #include <assert.h>
 #include <bootmode.h>
-#include <delay.h>
 #include <device/i2c_simple.h>
 #include <soc/i2c.h>
 #include <soc/reg_access.h>
-#include "reg_access.h"
-#include "gen1.h"
-#include "gen2.h"
 #include <spi_flash.h>
 #include <security/vboot/vboot_common.h>
 #include <security/vboot/vbnv.h>
 
+#include "reg_access.h"
+#include "gen1.h"
+#include "gen2.h"
+
 int clear_recovery_mode_switch(void)
 {
 	/* Nothing to do */

src/mainboard/lenovo/g505s/mainboard_smi.c

@@ -17,16 +17,16 @@
 /*
  * SMI handler -- mostly takes care of SMIs from the EC
  */
-#include "ec.h"
 
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
-#include <delay.h>
 #include <ec/compal/ene932/ec.h>
 #include <southbridge/amd/agesa/hudson/hudson.h>
 #include <southbridge/amd/agesa/hudson/smi.h>
 
+#include "ec.h"
+
 #define ACPI_PM1_CNT_SLEEP(state) ((1 << 13) | (state & 0x7) << 10)
 
 enum sleep_states {

src/mainboard/lenovo/s230u/smihandler.c

@@ -16,16 +16,15 @@
  * GNU General Public License for more details.
  */
 
-#include "ec.h"
-
 #include <console/console.h>
 #include <cpu/x86/smm.h>
-#include <delay.h>
 #include <ec/acpi/ec.h>
 #include <ec/compal/ene932/ec.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/pmutil.h>
 
+#include "ec.h"
+
 #define GPE_PALMDET1	2
 #define GPE_PALMDET2	4
 #define GPE_EC_SCI	7

src/mainboard/lenovo/x200/dock.c

@@ -16,17 +16,18 @@
  */
 
 #define __SIMPLE_DEVICE__
+
 #include <console/console.h>
 #include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <delay.h>
-#include "dock.h"
 #include <southbridge/intel/i82801ix/i82801ix.h>
 #include <ec/lenovo/h8/h8.h>
 #include <ec/acpi/ec.h>
 
+#include "dock.h"
+
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)
 
 void h8_mainboard_init_dock (void)

src/mainboard/opencellular/elgon/mainboard.c

@@ -20,7 +20,6 @@
 #include <libbdk-hal/bdk-config.h>
 #include <libbdk-hal/bdk-twsi.h>
 #include <soc/gpio.h>
-#include <delay.h>
 #include <soc/uart.h>
 #include <console/console.h>
 #include <soc/clock.h>

src/mainboard/packardbell/ms2290/mainboard.c

@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <arch/io.h>
-#include <delay.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <northbridge/intel/nehalem/nehalem.h>

src/mainboard/packardbell/ms2290/romstage.c

@@ -28,7 +28,6 @@
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>
 #include <ec/acpi/ec.h>
-#include <delay.h>
 #include <timestamp.h>
 #include <arch/acpi.h>
 

src/mainboard/packardbell/ms2290/smihandler.c

@@ -24,7 +24,6 @@
 #include <northbridge/intel/nehalem/nehalem.h>
 #include <cpu/intel/model_2065x/model_2065x.h>
 #include <ec/acpi/ec.h>
-#include <delay.h>
 
 static void mainboard_smm_init(void)
 {

src/mainboard/roda/rk886ex/mainboard.c

@@ -18,10 +18,9 @@
 #include <device/device.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>
-#include <delay.h>
 #include <drivers/intel/gma/int15.h>
-
 #include <ec/acpi/ec.h>
+
 #include "m3885.h"
 
 #define DUMP_RUNTIME_REGISTERS 0

src/mainboard/siemens/mc_tcu3/ptn3460.c

@@ -16,6 +16,8 @@
 #include <console/console.h>
 #include <hwilib.h>
 #include <string.h>
+#include <delay.h>
+
 #include "soc/i2c.h"
 #include "ptn3460.h"
 

src/mainboard/siemens/mc_tcu3/ptn3460.h

@@ -16,7 +16,6 @@
 #ifndef PTN3460_H_
 #define PTN3460_H_
 
-#include <delay.h>
 #include "lcd_panel.h"
 
 #define PTN_SLAVE_ADR		0x20

src/northbridge/amd/amdmct/wrappers/mcti_d.c

@@ -17,9 +17,9 @@
 /* Call-backs */
 
 #include <arch/cpu.h>
-#include <delay.h>
 #include <cpu/amd/msr.h>
 #include <console/console.h>
+
 #include "mcti.h"
 
 #define NVRAM_DDR2_800 0

src/northbridge/intel/fsp_rangeley/northbridge.c

@@ -19,7 +19,6 @@
 #include <arch/acpi.h>
 #include <device/pci_ops.h>
 #include <stdint.h>
-#include <delay.h>
 #include <cpu/intel/fsp_model_406dx/model_406dx.h>
 #include <device/device.h>
 #include <device/pci.h>

src/northbridge/intel/gm45/gma.c

@@ -16,10 +16,12 @@
 
 #include <device/mmio.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <drivers/intel/gma/edid.h>
+#include <drivers/intel/gma/opregion.h>
+#include <drivers/intel/gma/libgfxinit.h>
 #include <string.h>
 #include <device/pci_ops.h>
 #include <commonlib/helpers.h>
@@ -29,9 +31,6 @@
 #include "drivers/intel/gma/i915_reg.h"
 #include "chip.h"
 #include "gm45.h"
-#include <drivers/intel/gma/edid.h>
-#include <drivers/intel/gma/opregion.h>
-#include <drivers/intel/gma/libgfxinit.h>
 
 static struct resource *gtt_res = NULL;
 

src/northbridge/intel/haswell/minihd.c

@@ -21,7 +21,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <stdlib.h>
 #include <southbridge/intel/lynxpoint/hda_verb.h>
 

src/northbridge/intel/sandybridge/raminit.c

@@ -30,7 +30,7 @@
 #include <southbridge/intel/bd82x6x/me.h>
 #include <southbridge/intel/common/smbus.h>
 #include <cpu/x86/msr.h>
-#include <delay.h>
+
 #include "raminit_native.h"
 #include "raminit_common.h"
 #include "sandybridge.h"

src/northbridge/intel/x4x/gma.c

@@ -16,17 +16,12 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <commonlib/helpers.h>
 #include <cbmem.h>
-
-#include "drivers/intel/gma/i915_reg.h"
-#include "chip.h"
-#include "x4x.h"
 #include <drivers/intel/gma/intel_bios.h>
 #include <drivers/intel/gma/edid.h>
 #include <drivers/intel/gma/i915.h>
@@ -35,6 +30,10 @@
 #include <pc80/vga.h>
 #include <pc80/vga_io.h>
 
+#include "chip.h"
+#include "drivers/intel/gma/i915_reg.h"
+#include "x4x.h"
+
 #if CONFIG(SOUTHBRIDGE_INTEL_I82801JX)
 #include <southbridge/intel/i82801jx/nvs.h>
 #elif CONFIG(SOUTHBRIDGE_INTEL_I82801GX)

src/northbridge/intel/x4x/raminit.c

@@ -21,15 +21,12 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/cpu.h>
-#include <delay.h>
 #include <halt.h>
-#include "iomap.h"
 #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX)
 #include <southbridge/intel/i82801gx/i82801gx.h> /* smbus_read_byte */
 #else
 #include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */
 #endif
-#include "x4x.h"
 #include <spd.h>
 #include <string.h>
 #include <device/dram/ddr2.h>
@@ -37,6 +34,9 @@
 #include <mrc_cache.h>
 #include <timestamp.h>
 
+#include "iomap.h"
+#include "x4x.h"
+
 #define MRC_CACHE_VERSION 0
 
 static inline int spd_read_byte(unsigned int device, unsigned int address)

src/security/vboot/vboot_logic.c

@@ -18,7 +18,6 @@
 #include <bootmode.h>
 #include <console/console.h>
 #include <console/vtxprintf.h>
-#include <delay.h>
 #include <string.h>
 #include <timestamp.h>
 #include <vb2_api.h>

src/soc/amd/common/block/pi/agesawrapper.c

@@ -16,7 +16,6 @@
 
 #include <arch/acpi.h>
 #include <cbmem.h>
-#include <delay.h>
 #include <timestamp.h>
 #include <amdblocks/s3_resume.h>
 #include <amdblocks/agesawrapper.h>

src/soc/amd/stoneyridge/hda.c

@@ -17,7 +17,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <delay.h>
 #include <soc/southbridge.h>
 
 static const unsigned short pci_device_ids[] = {

src/soc/amd/stoneyridge/sata.c

@@ -14,7 +14,6 @@
  */
 
 #include <device/device.h>
-#include <delay.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/soc/amd/stoneyridge/smihandler.c

@@ -21,7 +21,6 @@
 #include <cpu/x86/cache.h>
 #include <arch/acpi.h>
 #include <arch/hlt.h>
-#include <delay.h>
 #include <device/pci_def.h>
 #include <soc/smi.h>
 #include <soc/southbridge.h>

src/soc/cavium/cn81xx/include/soc/timer.h

@@ -18,7 +18,6 @@
 
 #include <inttypes.h>
 #include <types.h>
-#include <delay.h>
 
 /* Watchdog functions */
 void watchdog_set(const size_t index, unsigned int timeout_ms);

src/soc/cavium/cn81xx/spi.c

@@ -19,7 +19,6 @@
 #include <device/mmio.h>
 #include <assert.h>
 #include <console/console.h>
-#include <delay.h>
 #include <endian.h>
 #include <soc/addressmap.h>
 #include <soc/spi.h>

src/soc/cavium/cn81xx/timer.c

@@ -16,6 +16,7 @@
  * Derived from Cavium's BSD-3 Clause OCTEONTX-SDK-6.2.0.
  */
 
+#include <delay.h>
 #include <device/mmio.h>
 #include <arch/lib_helpers.h>
 #include <console/console.h>

src/soc/cavium/common/bdk-coreboot.c

@@ -15,13 +15,13 @@
  *
  * This file consists of data imported from bdk-config.c
  */
+
 // coreboot
 #include <string.h>
 #include <assert.h>
 #include <device/i2c.h>
 #include <device/i2c_simple.h>
 #include <endian.h>
-#include <delay.h>
 #include <soc/timer.h>
 
 // BDK

src/soc/intel/baytrail/gfx.c

@@ -16,14 +16,12 @@
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <drivers/intel/gma/opregion.h>
 #include <reg_script.h>
 #include <stdlib.h>
-
 #include <soc/gfx.h>
 #include <soc/iosf.h>
 #include <soc/nvs.h>

src/soc/intel/braswell/sata.c

@@ -18,7 +18,6 @@
 #include <soc/ramstage.h>
 #include <soc/sata.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>

src/soc/intel/broadwell/adsp.c

@@ -20,7 +20,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <soc/adsp.h>
 #include <soc/device_nvs.h>
 #include <soc/iobp.h>

src/soc/intel/broadwell/ehci.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>

src/soc/intel/broadwell/hda.c

@@ -22,7 +22,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <soc/intel/common/hda_verb.h>
 #include <soc/pch.h>
 #include <soc/ramstage.h>

src/soc/intel/broadwell/lpc.c

@@ -15,7 +15,6 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>

src/soc/intel/broadwell/minihd.c

@@ -21,7 +21,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/mmio.h>
-#include <delay.h>
 #include <stdlib.h>
 #include <soc/intel/common/hda_verb.h>
 #include <soc/ramstage.h>

src/soc/intel/broadwell/pch.c

@@ -15,7 +15,6 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/broadwell/romstage/uart.c

@@ -14,7 +14,6 @@
  */
 
 #include <arch/early_variables.h>
-#include <delay.h>
 #include <device/pci_def.h>
 #include <reg_script.h>
 #include <stdint.h>

src/soc/intel/cannonlake/lpc.c

@@ -15,8 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include "chip.h"
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <pc80/isa-dma.h>
@@ -34,6 +32,8 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
+#include "chip.h"
+
 /*
 * As per the BWG, Chapter 5.9.1. "PCH BIOS component will reserve
 * certain memory range as reserved range for BIOS usage.

src/soc/intel/common/block/cpu/cpulib.c

@@ -21,7 +21,6 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/cpu.h>
-#include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
 #include <soc/cpu.h>

src/soc/intel/common/block/systemagent/systemagent_early.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <device/pci_ops.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <intelblocks/systemagent.h>

src/soc/intel/fsp_baytrail/gfx.c

@@ -15,13 +15,11 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <reg_script.h>
 #include <stdlib.h>
-
 #include <soc/gfx.h>
 #include <soc/iosf.h>
 #include <soc/pci_devs.h>

src/soc/intel/fsp_broadwell_de/smihandler.c

@@ -15,7 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <types.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>

src/soc/intel/icelake/lpc.c

@@ -13,9 +13,7 @@
  * GNU General Public License for more details.
  */
 
-#include "chip.h"
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <pc80/isa-dma.h>
@@ -33,6 +31,8 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
+#include "chip.h"
+
 /*
 * As per the BWG, Chapter 5.9.1. "PCH BIOS component will reserve
 * certain memory range as reserved range for BIOS usage.

src/soc/intel/quark/gpio_i2c.c

@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <device/i2c_simple.h>
 #include <device/pci.h>

src/soc/intel/quark/include/soc/reg_access.h

@@ -19,7 +19,6 @@
 #include <cpu/x86/cr.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
-#include <delay.h>
 #include <fsp/util.h>
 #include <reg_script.h>
 #include <soc/IntelQNCConfig.h>

src/soc/intel/quark/reg_access.c

@@ -19,6 +19,7 @@
 #include <assert.h>
 #include <cpu/x86/mtrr.h>
 #include <console/console.h>
+#include <delay.h>
 #include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>

src/soc/intel/quark/romstage/pcie.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <delay.h>
 #include <device/device.h>
 #include <soc/pci_devs.h>
 #include <soc/reg_access.h>

src/soc/intel/skylake/cpu.c

@@ -33,7 +33,6 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/name.h>
 #include <cpu/x86/smm.h>
-#include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/mp_init.h>

src/soc/intel/skylake/lpc.c

@@ -15,8 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include "chip.h"
-#include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <pc80/isa-dma.h>
@@ -30,6 +28,8 @@
 #include <soc/pcr_ids.h>
 #include <soc/intel/common/block/lpc/lpc_def.h>
 
+#include "chip.h"
+
 /**
   PCH preserved MMIO range, 24 MB, from 0xFD000000 to 0xFE7FFFFF
 **/

src/soc/mediatek/common/include/soc/rtc_common.h

@@ -19,7 +19,6 @@
 #include <assert.h>
 #include <bcd.h>
 #include <console/console.h>
-#include <delay.h>
 #include <rtc.h>
 #include <soc/pmic_wrap_common.h>
 

src/soc/mediatek/common/rtc.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <delay.h>
 #include <soc/rtc_common.h>
 #include <soc/rtc.h>
 #include <soc/pmic_wrap.h>

src/soc/mediatek/common/usb.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <console/console.h>
-#include <delay.h>
 #include <soc/addressmap.h>
 #include <soc/usb.h>
 #include <timer.h>

src/soc/mediatek/mt8173/ddp.c

@@ -14,7 +14,6 @@
  */
 
 #include <device/mmio.h>
-#include <delay.h>
 #include <edid.h>
 #include <stdlib.h>
 #include <stddef.h>

src/soc/mediatek/mt8173/dramc_pi_calibration_api.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <assert.h>
-#include <delay.h>
 #include <stdlib.h>
 #include <soc/addressmap.h>
 #include <soc/dramc_common.h>

src/soc/mediatek/mt8173/emi.c

@@ -17,7 +17,6 @@
 #include <assert.h>
 #include <boardid.h>
 #include <console/console.h>
-#include <delay.h>
 #include <soc/addressmap.h>
 #include <soc/dramc_common.h>
 #include <soc/dramc_register.h>

src/soc/mediatek/mt8173/rtc.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <delay.h>
 #include <soc/rtc_common.h>
 #include <soc/rtc.h>
 #include <soc/mt6391.h>

src/soc/mediatek/mt8183/rtc.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <delay.h>
 #include <halt.h>
 #include <soc/rtc_common.h>
 #include <soc/rtc.h>

src/soc/nvidia/tegra/gpio.c

@@ -18,7 +18,6 @@
 #include <soc/addressmap.h>
 #include <stddef.h>
 #include <stdint.h>
-#include <delay.h>
 
 #include "pinmux.h"
 

src/soc/nvidia/tegra210/mipi_dsi.c

@@ -38,10 +38,10 @@
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
+
 #include <console/console.h>
 #include <stdint.h>
 #include <stdlib.h>
-#include <delay.h>
 #include <string.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>

src/soc/qualcomm/ipq40xx/i2c.c

@@ -31,7 +31,6 @@
 
 #include <assert.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/i2c_simple.h>
 #include <stdlib.h>
 #include <string.h>

src/soc/qualcomm/ipq806x/i2c.c

@@ -29,7 +29,6 @@
 
 #include <assert.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/i2c_simple.h>
 #include <stdlib.h>
 #include <string.h>

src/soc/qualcomm/sdm845/clock.c

@@ -16,7 +16,6 @@
 #include <device/mmio.h>
 #include <types.h>
 #include <console/console.h>
-#include <delay.h>
 #include <commonlib/helpers.h>
 #include <assert.h>
 #include <soc/clock.h>

src/soc/qualcomm/sdm845/gpio.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <types.h>
-#include <delay.h>
 #include <gpio.h>
 
 void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull,

src/soc/rockchip/common/pwm.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <assert.h>
-#include <delay.h>
 #include <soc/addressmap.h>
 #include <soc/grf.h>
 #include <soc/soc.h>

src/soc/rockchip/common/vop.c

@@ -14,7 +14,6 @@
  */
 
 #include <device/mmio.h>
-#include <delay.h>
 #include <stdlib.h>
 #include <stddef.h>
 #include <soc/addressmap.h>

src/soc/rockchip/rk3288/soc.c

@@ -16,7 +16,6 @@
 #include <arch/cache.h>
 #include <bootmode.h>
 #include <console/console.h>
-#include <delay.h>
 #include <device/device.h>
 #include <gpio.h>
 #include <soc/display.h>

src/soc/rockchip/rk3288/tsadc.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <assert.h>
-#include <delay.h>
 #include <soc/clock.h>
 #include <soc/grf.h>
 #include <soc/pmu.h>

src/soc/rockchip/rk3399/usb.c

@@ -16,7 +16,6 @@
 #include <device/mmio.h>
 #include <assert.h>
 #include <console/console.h>
-#include <delay.h>
 #include <soc/clock.h>
 #include <soc/grf.h>
 #include <soc/soc.h>