diff --git a/src/mainboard/advansus/a785e-i/get_bus_conf.c b/src/mainboard/advansus/a785e-i/get_bus_conf.c index 2e035b5fa5..598bef42d1 100644 --- a/src/mainboard/advansus/a785e-i/get_bus_conf.c +++ b/src/mainboard/advansus/a785e-i/get_bus_conf.c @@ -23,7 +23,6 @@ /* Global variables for MB layouts and these will be shared by irqtable mptable * and acpi_tables busnum is default. */ -u8 bus_sb800[6]; u32 apicid_sb800; /* @@ -48,7 +47,6 @@ u32 hcdnx[] = { void get_bus_conf(void) { u32 apicid_base; - struct device *dev; int i; sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); @@ -61,22 +59,8 @@ void get_bus_conf(void) sysconf.sbdn = (sysconf.hcdn[0] & 0xff); - memset(bus_sb800, 0, sizeof(bus_sb800)); - bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff; - - /* sb800 */ - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x14, 4)); - if (dev) { - bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - - for (i = 0; i < 4; i++) { - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x15, i)); - if (dev) { - bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - } + pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff; /* I/O APICs: APIC ID Version State Address */ if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) diff --git a/src/mainboard/advansus/a785e-i/irq_tables.c b/src/mainboard/advansus/a785e-i/irq_tables.c index 5d08c1fbdf..a453c766bd 100644 --- a/src/mainboard/advansus/a785e-i/irq_tables.c +++ b/src/mainboard/advansus/a785e-i/irq_tables.c @@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, pirq_info->rfu = rfu; } -extern u8 bus_sb800[6]; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -64,7 +63,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - pirq->rtr_bus = bus_sb800[0]; + pirq->rtr_bus = pirq_router_bus; pirq->rtr_devfn = PCI_DEVFN(0x14, 4); pirq->exclusive_irqs = 0; @@ -80,7 +79,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) slot_num = 0; /* pci bridge */ - write_pirq_info(pirq_info, bus_sb800[0], PCI_DEVFN(0x14, 4), + write_pirq_info(pirq_info, pirq_router_bus, PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; diff --git a/src/mainboard/advansus/a785e-i/mptable.c b/src/mainboard/advansus/a785e-i/mptable.c index 9188a19abc..09eadc550f 100644 --- a/src/mainboard/advansus/a785e-i/mptable.c +++ b/src/mainboard/advansus/a785e-i/mptable.c @@ -20,7 +20,6 @@ #include #include -extern u8 bus_sb800[6]; extern u32 apicid_sb800; u8 intr_data[] = { diff --git a/src/mainboard/amd/bimini_fam10/get_bus_conf.c b/src/mainboard/amd/bimini_fam10/get_bus_conf.c index 76048190bb..a03714d5a2 100644 --- a/src/mainboard/amd/bimini_fam10/get_bus_conf.c +++ b/src/mainboard/amd/bimini_fam10/get_bus_conf.c @@ -23,7 +23,6 @@ /* Global variables for MB layouts and these will be shared by irqtable mptable * and acpi_tables busnum is default. */ -u8 bus_sb800[6]; u32 apicid_sb800; /* @@ -48,7 +47,6 @@ u32 hcdnx[] = { void get_bus_conf(void) { u32 apicid_base; - struct device *dev; int i; sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); @@ -61,22 +59,8 @@ void get_bus_conf(void) sysconf.sbdn = (sysconf.hcdn[0] & 0xff); - memset(bus_sb800, 0, sizeof(bus_sb800)); - bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff; - - /* sb800 */ - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x14, 4)); - if (dev) { - bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - - for (i = 0; i < 4; i++) { - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x15, i)); - if (dev) { - bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - } + pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff; /* I/O APICs: APIC ID Version State Address */ if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) diff --git a/src/mainboard/amd/bimini_fam10/irq_tables.c b/src/mainboard/amd/bimini_fam10/irq_tables.c index 40f283639b..58adb0d90e 100644 --- a/src/mainboard/amd/bimini_fam10/irq_tables.c +++ b/src/mainboard/amd/bimini_fam10/irq_tables.c @@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, pirq_info->rfu = rfu; } -extern u8 bus_sb800[6]; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -64,7 +63,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - pirq->rtr_bus = bus_sb800[0]; + pirq->rtr_bus = pirq_router_bus; pirq->rtr_devfn = PCI_DEVFN(0x14, 4); pirq->exclusive_irqs = 0; @@ -80,7 +79,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) slot_num = 0; /* pci bridge */ - write_pirq_info(pirq_info, bus_sb800[0], PCI_DEVFN(0x14, 4), + write_pirq_info(pirq_info, pirq_router_bus, PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; diff --git a/src/mainboard/amd/bimini_fam10/mptable.c b/src/mainboard/amd/bimini_fam10/mptable.c index 7feabf7cbf..e2aec96945 100644 --- a/src/mainboard/amd/bimini_fam10/mptable.c +++ b/src/mainboard/amd/bimini_fam10/mptable.c @@ -21,7 +21,6 @@ #include #include -extern u8 bus_sb800[6]; extern u32 apicid_sb800; u8 intr_data[] = { diff --git a/src/mainboard/asus/m5a88-v/get_bus_conf.c b/src/mainboard/asus/m5a88-v/get_bus_conf.c index 2e035b5fa5..598bef42d1 100644 --- a/src/mainboard/asus/m5a88-v/get_bus_conf.c +++ b/src/mainboard/asus/m5a88-v/get_bus_conf.c @@ -23,7 +23,6 @@ /* Global variables for MB layouts and these will be shared by irqtable mptable * and acpi_tables busnum is default. */ -u8 bus_sb800[6]; u32 apicid_sb800; /* @@ -48,7 +47,6 @@ u32 hcdnx[] = { void get_bus_conf(void) { u32 apicid_base; - struct device *dev; int i; sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); @@ -61,22 +59,8 @@ void get_bus_conf(void) sysconf.sbdn = (sysconf.hcdn[0] & 0xff); - memset(bus_sb800, 0, sizeof(bus_sb800)); - bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff; - - /* sb800 */ - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x14, 4)); - if (dev) { - bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - - for (i = 0; i < 4; i++) { - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x15, i)); - if (dev) { - bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - } + pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff; /* I/O APICs: APIC ID Version State Address */ if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) diff --git a/src/mainboard/asus/m5a88-v/irq_tables.c b/src/mainboard/asus/m5a88-v/irq_tables.c index 5d08c1fbdf..a453c766bd 100644 --- a/src/mainboard/asus/m5a88-v/irq_tables.c +++ b/src/mainboard/asus/m5a88-v/irq_tables.c @@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, pirq_info->rfu = rfu; } -extern u8 bus_sb800[6]; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -64,7 +63,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - pirq->rtr_bus = bus_sb800[0]; + pirq->rtr_bus = pirq_router_bus; pirq->rtr_devfn = PCI_DEVFN(0x14, 4); pirq->exclusive_irqs = 0; @@ -80,7 +79,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) slot_num = 0; /* pci bridge */ - write_pirq_info(pirq_info, bus_sb800[0], PCI_DEVFN(0x14, 4), + write_pirq_info(pirq_info, pirq_router_bus, PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; diff --git a/src/mainboard/asus/m5a88-v/mptable.c b/src/mainboard/asus/m5a88-v/mptable.c index 4a1c40e090..a5e79e3529 100644 --- a/src/mainboard/asus/m5a88-v/mptable.c +++ b/src/mainboard/asus/m5a88-v/mptable.c @@ -20,7 +20,6 @@ #include #include -extern u8 bus_sb800[6]; extern u32 apicid_sb800; u8 intr_data[] = { diff --git a/src/mainboard/avalue/eax-785e/get_bus_conf.c b/src/mainboard/avalue/eax-785e/get_bus_conf.c index 2e035b5fa5..598bef42d1 100644 --- a/src/mainboard/avalue/eax-785e/get_bus_conf.c +++ b/src/mainboard/avalue/eax-785e/get_bus_conf.c @@ -23,7 +23,6 @@ /* Global variables for MB layouts and these will be shared by irqtable mptable * and acpi_tables busnum is default. */ -u8 bus_sb800[6]; u32 apicid_sb800; /* @@ -48,7 +47,6 @@ u32 hcdnx[] = { void get_bus_conf(void) { u32 apicid_base; - struct device *dev; int i; sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); @@ -61,22 +59,8 @@ void get_bus_conf(void) sysconf.sbdn = (sysconf.hcdn[0] & 0xff); - memset(bus_sb800, 0, sizeof(bus_sb800)); - bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff; - - /* sb800 */ - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x14, 4)); - if (dev) { - bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - - for (i = 0; i < 4; i++) { - dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(0x15, i)); - if (dev) { - bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); - } - } + pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff; /* I/O APICs: APIC ID Version State Address */ if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) diff --git a/src/mainboard/avalue/eax-785e/irq_tables.c b/src/mainboard/avalue/eax-785e/irq_tables.c index 5d08c1fbdf..a453c766bd 100644 --- a/src/mainboard/avalue/eax-785e/irq_tables.c +++ b/src/mainboard/avalue/eax-785e/irq_tables.c @@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, pirq_info->rfu = rfu; } -extern u8 bus_sb800[6]; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -64,7 +63,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - pirq->rtr_bus = bus_sb800[0]; + pirq->rtr_bus = pirq_router_bus; pirq->rtr_devfn = PCI_DEVFN(0x14, 4); pirq->exclusive_irqs = 0; @@ -80,7 +79,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) slot_num = 0; /* pci bridge */ - write_pirq_info(pirq_info, bus_sb800[0], PCI_DEVFN(0x14, 4), + write_pirq_info(pirq_info, pirq_router_bus, PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; diff --git a/src/mainboard/avalue/eax-785e/mptable.c b/src/mainboard/avalue/eax-785e/mptable.c index 2197dabe7c..4cc20fc47f 100644 --- a/src/mainboard/avalue/eax-785e/mptable.c +++ b/src/mainboard/avalue/eax-785e/mptable.c @@ -20,7 +20,6 @@ #include #include -extern u8 bus_sb800[6]; extern u32 apicid_sb800; u8 intr_data[] = {