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intel/bd82x6x: Add new current for native USB ports 

Change-Id: I88ef36b94b961a318d280d8de1b8721fcbeb93b0
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/7237
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Damien Zammit 2014-10-29 08:58:28 +11:00 committed by Edward O'Callaghan
parent 49c70b6182
commit bf30ae63a9
1 changed files with 1 additions and 1 deletions
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src/southbridge/intel/bd82x6x/early_usb_native.c
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@ -33,7 +33,7 @@ early_usb_init (const struct southbridge_usb_port *portmap)
/* 3560 */ 0x024c8001, 0x000024a3, 0x00040002, 0x01000050, /* 3560 */ 0x024c8001, 0x000024a3, 0x00040002, 0x01000050,
/* 3570 */ 0x02000772, 0x16000f9f, 0x1800ff4f, 0x0001d630, /* 3570 */ 0x02000772, 0x16000f9f, 0x1800ff4f, 0x0001d630,
}; };
const u32 currents[] = { 0x20000153, 0x20000f57, 0x2000055b, 0x20000f51 , 0x2000094a }; const u32 currents[] = { 0x20000153, 0x20000f57, 0x2000055b, 0x20000f51 , 0x2000094a, 0x2000035f };
int i; int i;
/* Activate PMBAR. */ /* Activate PMBAR. */
pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, DEFAULT_PMBASE | 1); pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, DEFAULT_PMBASE | 1);