mb/purism/librem_cnl: Adjust in preparation for new variants

- Move the SoC select to board config (vs baseboard config)
- Qualify the VGA PCI ID and CBFS size values based on board selection
- Move devicetree to variant dir and add Kconfig entry
- Use a separate board_info.txt for the baseboard and each variant

Change-Id: I4764f2c1243ea49bd08e0735865cc3cb7a66441f
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47051
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Matt DeVillier 2020-10-29 20:37:56 -05:00 committed by Angel Pons
parent 54e0fd21b1
commit bf355e7159
5 changed files with 17 additions and 5 deletions

View File

@ -9,7 +9,6 @@ config BOARD_PURISM_BASEBOARD_LIBREM_CNL
select NO_UART_ON_SUPERIO
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_WHISKEYLAKE
select SPD_READ_BY_WORD
select USE_LEGACY_8254_TIMER
@ -31,9 +30,13 @@ config VARIANT_DIR
string
default "librem_mini" if BOARD_PURISM_LIBREM_MINI
config DEVICETREE
string
default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
config CBFS_SIZE
hex
default 0x800000
default 0x800000 if BOARD_PURISM_LIBREM_MINI
config MAX_CPUS
int
@ -49,7 +52,7 @@ config DIMM_SPD_SIZE
config VGA_BIOS_ID
string
default "8086,3ea0"
default "8086,3ea0" if BOARD_PURISM_LIBREM_MINI
config PXE_ROM_ID
string

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@ -1,3 +1,4 @@
config BOARD_PURISM_LIBREM_MINI
bool "Librem Mini"
select BOARD_PURISM_BASEBOARD_LIBREM_CNL
select SOC_INTEL_WHISKEYLAKE

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@ -1,6 +1,6 @@
Vendor name: Purism
Board name: librem_cnl
Category: desktop
Board name: Librem Cannonlake baseboard
Category: misc
Release year: 2020
ROM package: SOIC-8
ROM protocol: SPI

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@ -0,0 +1,8 @@
Vendor name: Purism
Board name: Librem Mini
Category: desktop
Release year: 2020
ROM package: SOIC-8
ROM protocol: SPI
ROM socketed: n
Flashrom support: y