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drivers/amd: Update to use defined post codes 

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I2d5700534c07e89b3908a2e6b827db919a48795d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Martin Roth 2022-12-31 16:31:01 -07:00 committed by Martin L Roth
parent cba09c8f13
commit bf3f94dbb2
1 changed files with 3 additions and 2 deletions
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5
src/drivers/amd/agesa/cache_as_ram.S
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@ -12,6 +12,7 @@
#include <cpu/x86/lapic_def.h>
#include <cpu/x86/post_code.h>
#include <amdblocks/post_codes.h>
.section .init
@ -30,7 +31,7 @@ _cache_as_ram_setup:
*/
bootblock_pre_c_entry:
post_code(0xa0)
post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
AMD_ENABLE_STACK
@ -56,7 +57,7 @@ bootblock_pre_c_entry:
movd %mm1, %eax
pushl %eax /* tsc[31:0] */
post_code(0xa2)
post_code(POST_BOOTBLOCK_PRE_C_DONE)
call bootblock_c_entry