mb/google/dedede Add Audio support for waddledoo
1. Configure Audio GPIOs. 2. Set i2c4 configuration. 3. Update PCH HDA configuration TEST=Verify codecs gets listed with aplay -l command. Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Signed-off-by: Yong Zhi <yong.zhi@intel.com> Change-Id: Ic0516c7a8fee79ce17343a7f42895d6ef534fec9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39285 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Aamir Bohra
Patrick Georgi
parent
a1c82c5ebe
commit
bf48f6ab11
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@ -9,6 +9,8 @@ config BOARD_GOOGLE_WADDLEDOO
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select BOARD_GOOGLE_BASEBOARD_DEDEDE
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select BASEBOARD_DEDEDE_LAPTOP
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select BOARD_ROMSIZE_KB_32768
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select DRIVERS_GENERIC_MAX98357A
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select DRIVERS_I2C_DA7219
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config BOARD_GOOGLE_WADDLEDEE
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bool "Waddledee"
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@ -103,6 +103,14 @@ chip soc/intel/tigerlake
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register "PcieClkSrcClkReq[4]" = "4"
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register "PcieClkSrcClkReq[5]" = "5"
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# Audio related configurations
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register "PchHdaDspEnable" = "1"
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register "PchHdaAudioLinkHdaEnable" = "1"
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register "PchHdaAudioLinkSspEnable[0]" = "1"
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register "PchHdaAudioLinkSspEnable[1]" = "1"
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register "PchHdaAudioLinkDmicEnable[0]" = "1"
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register "PchHdaAudioLinkDmicEnable[1]" = "1"
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# Enable EMMC HS400 mode
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register "ScsEmmcHs400Enabled" = "1"
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@ -178,11 +178,11 @@ static const struct pad_config gpio_table[] = {
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/* D15 : UCAM_RST_L */
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PAD_NC(GPP_D15, NONE),
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/* D16 : HP_INT_ODL */
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PAD_NC(GPP_D16, NONE),
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PAD_CFG_GPI_INT(GPP_D16, NONE, PLTRST, EDGE_BOTH),
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/* D17 : EN_SPK */
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PAD_NC(GPP_D17, NONE),
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PAD_CFG_GPO(GPP_D17, 1, PLTRST),
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/* D18 : I2S_MCLK */
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PAD_NC(GPP_D18, NONE),
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PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
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/* D19 : WWAN_WLAN_COEX1 */
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PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
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/* D20 : WWAN_WLAN_COEX2 */
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@ -319,7 +319,7 @@ static const struct pad_config gpio_table[] = {
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/* H14 : GPP_H14/AVS_I2S2_RXD */
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PAD_NC(GPP_H14, NONE),
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/* H15 : I2S_SPK_BCLK */
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PAD_NC(GPP_H15, NONE),
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PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
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/* H16 : AP_SUB_IO_L */
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PAD_NC(GPP_H16, NONE),
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/* H17 : WWAN_RST_L */
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@ -330,38 +330,40 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_H19, 1, DEEP),
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/* R0 : I2S_HP_BCLK */
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PAD_NC(GPP_R0, NONE),
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PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2),
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/* R1 : I2S_HP_LRCK */
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PAD_NC(GPP_R1, NONE),
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PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2),
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/* R2 : I2S_HP_AUDIO */
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PAD_NC(GPP_R2, NONE),
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PAD_CFG_NF(GPP_R2, NONE, DEEP, NF2),
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/* R3 : I2S_HP_MIC */
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PAD_NC(GPP_R3, NONE),
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PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2),
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/* R4 : GPP_R04/HDA_RST_N */
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PAD_NC(GPP_R4, NONE),
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/* R5 : GPP_R05/HDA_SDI1/AVS_I2S1_RXD */
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PAD_NC(GPP_R5, NONE),
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/* R6 : I2S_SPK_LRCK */
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PAD_NC(GPP_R6, NONE),
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/* R7 : I2S_SPK_AUDIO */
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PAD_NC(GPP_R7, NONE),
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PAD_CFG_NF(GPP_R6, NONE, DEEP, NF1),
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/* R7 : I2S_SPK_AUDIO */
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PAD_CFG_NF(GPP_R7, NONE, DEEP, NF1),
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/* S0 : RAM_STRAP_4 */
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PAD_NC(GPP_S0, NONE),
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/* S1 : RSVD_STRAP */
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PAD_NC(GPP_S1, NONE),
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/* S2 : DMIC1_CLK */
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PAD_NC(GPP_S2, NONE),
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PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2),
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/* S3 : DMIC1_DATA */
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PAD_NC(GPP_S3, NONE),
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PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2),
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/* S4 : GPP_S04/SNDW1_CLK */
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PAD_NC(GPP_S4, NONE),
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/* S5 : GPP_S05/SNDW1_DATA */
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PAD_NC(GPP_S5, NONE),
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/* S6 : DMIC0_CLK */
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PAD_NC(GPP_S6, NONE),
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/* S6 : DMIC0_CLK */
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PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2),
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/* S7 : DMIC0_DATA */
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PAD_NC(GPP_S7, NONE),
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PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2),
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/* GPD0 : AP_BATLOW_L */
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PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
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@ -36,6 +36,12 @@ chip soc/intel/tigerlake
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},
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.i2c[4] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 176,
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.scl_hcnt = 95,
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.sda_hold = 36,
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}
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},
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}"
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device domain 0 on
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@ -49,12 +55,37 @@ chip soc/intel/tigerlake
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device i2c 15 on end
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end
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end #I2C 0
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device pci 1c.7 on
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chip drivers/intel/wifi
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register "wake" = "GPE0_DW2_03"
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device pci 00.0 on end
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end
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end # PCI Express Root Port 8 - WLAN
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device pci 19.0 on
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chip drivers/i2c/da7219
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)"
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register "btn_cfg" = "50"
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register "mic_det_thr" = "500"
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register "jack_ins_deb" = "20"
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register "jack_det_rate" = ""32ms_64ms""
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register "jack_rem_deb" = "1"
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register "a_d_btn_thr" = "0xa"
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register "d_b_btn_thr" = "0x16"
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register "b_c_btn_thr" = "0x21"
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register "c_mic_btn_thr" = "0x3e"
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register "btn_avg" = "4"
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register "adc_1bit_rpt" = "1"
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register "micbias_lvl" = "2600"
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register "mic_amp_in_sel" = ""diff""
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device i2c 1a on end
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end
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end #I2C 4
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device pci 1f.3 on
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chip drivers/generic/max98357a
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register "hid" = ""MX98360A""
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register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D17)"
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device generic 0 on end
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end
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end # Intel HDA
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end
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end
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