From bf6b6afa9e3e087d7c4d58c32d0a1e21741baa10 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 18 Oct 2019 14:02:57 +0200 Subject: [PATCH] mb/lenovo/x200/dock.c: Use common southbridge gpio code Change-Id: I5b527a23aa0b0038936bb4b77176331fdfd6d914 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36127 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/mainboard/lenovo/x200/dock.c | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/src/mainboard/lenovo/x200/dock.c b/src/mainboard/lenovo/x200/dock.c index d5f774bb48..233b134702 100644 --- a/src/mainboard/lenovo/x200/dock.c +++ b/src/mainboard/lenovo/x200/dock.c @@ -15,21 +15,14 @@ * GNU General Public License for more details. */ -#define __SIMPLE_DEVICE__ - #include -#include -#include #include -#include -#include +#include #include #include #include "dock.h" -#define LPC_DEV PCI_DEV(0, 0x1f, 0) - void h8_mainboard_init_dock (void) { if (dock_present()) { @@ -41,22 +34,19 @@ void h8_mainboard_init_dock (void) void dock_connect(void) { - u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc; ec_set_bit(0x02, 0); - outl(inl(gpiobase + 0x0c) | (1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_HIGH); } void dock_disconnect(void) { - u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc; ec_clr_bit(0x02, 0); - outl(inl(gpiobase + 0x0c) & ~(1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_LOW); } int dock_present(void) { - u16 gpiobase = pci_read_config16(LPC_DEV, D31F0_GPIO_BASE) & 0xfffc; - u8 st = inb(gpiobase + 0x0c); + const int dock_id_gpio[] = { 2, 3, 4, -1}; - return ((st >> 2) & 7) != 7; + return get_gpios(dock_id_gpio) != 7; }