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soc/intel: Add support for USB ACPI code generation 

To support generating USB devices in ACPI the platform needs to
know how to determine a device name for each USB port, and for
any root hubs that may be present.

Recent Intel platforms route all ports to an XHCI controller
through a root hub.  This is supported by considering the root
hub to be USB port type 0, the USB 2.0 ports to be type 2, and
the USB 3.0 ports to be type 3.

This was tested with a Kaby Lake platform by adding entries to
the devicetree and checking the resulting SSDT.

Change-Id: I527a63bdc64f9243fe57487363ee6d5f60be84ca
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/26174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Duncan Laurie 2018-05-07 15:33:18 -07:00 committed by Patrick Georgi
parent 4721f43390
commit bf713b04b6
5 changed files with 100 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
src/soc/intel/apollolake/acpi/xhci.asl
View File

@ -28,4 +28,28 @@ Device (XHC1) {
{ {
Return (0xF) Return (0xF)
} }
Device (RHUB)
{
/* Root Hub */
Name (_ADR, Zero)
/* USB2 */
Device (HS01) { Name (_ADR, 1) }
Device (HS02) { Name (_ADR, 2) }
Device (HS03) { Name (_ADR, 3) }
Device (HS04) { Name (_ADR, 4) }
Device (HS05) { Name (_ADR, 5) }
Device (HS06) { Name (_ADR, 6) }
Device (HS07) { Name (_ADR, 7) }
Device (HS08) { Name (_ADR, 8) }
/* USB3 */
Device (SS01) { Name (_ADR, 9) }
Device (SS02) { Name (_ADR, 10) }
Device (SS03) { Name (_ADR, 11) }
Device (SS04) { Name (_ADR, 12) }
Device (SS05) { Name (_ADR, 13) }
Device (SS06) { Name (_ADR, 14) }
}
} }

36
src/soc/intel/apollolake/chip.c
View File

@ -34,6 +34,7 @@
#include <intelblocks/xdci.h> #include <intelblocks/xdci.h>
#include <fsp/api.h> #include <fsp/api.h>
#include <fsp/util.h> #include <fsp/util.h>
#include <intelblocks/acpi.h>
#include <intelblocks/cpulib.h> #include <intelblocks/cpulib.h>
#include <intelblocks/itss.h> #include <intelblocks/itss.h>
#include <intelblocks/pmclib.h> #include <intelblocks/pmclib.h>
@ -50,11 +51,44 @@
#include "chip.h" #include "chip.h"
static const char *soc_acpi_name(const struct device *dev) const char *soc_acpi_name(const struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)
return "PCI0"; return "PCI0";
if (dev->path.type == DEVICE_PATH_USB) {
switch (dev->path.usb.port_type) {
case 0:
/* Root Hub */
return "RHUB";
case 2:
/* USB2 ports */
switch (dev->path.usb.port_id) {
case 0: return "HS01";
case 1: return "HS02";
case 2: return "HS03";
case 3: return "HS04";
case 4: return "HS05";
case 5: return "HS06";
case 6: return "HS07";
case 7: return "HS08";
}
break;
case 3:
/* USB3 ports */
switch (dev->path.usb.port_id) {
case 0: return "SS01";
case 1: return "SS02";
case 2: return "SS03";
case 3: return "SS04";
case 4: return "SS05";
case 5: return "SS06";
}
break;
}
return NULL;
}
if (dev->path.type != DEVICE_PATH_PCI) if (dev->path.type != DEVICE_PATH_PCI)
return NULL; return NULL;

3
src/soc/intel/common/block/include/intelblocks/acpi.h
View File

@ -29,6 +29,9 @@ struct chipset_power_state;
/* Forward declare the global nvs structure here */ /* Forward declare the global nvs structure here */
struct global_nvs_t; struct global_nvs_t;
/* Return ACPI name for this device */
const char *soc_acpi_name(const struct device *dev);
/* Read the scis from soc specific register. Returns int scis value */ /* Read the scis from soc specific register. Returns int scis value */
uint32_t soc_read_sci_irq_select(void); uint32_t soc_read_sci_irq_select(void);

3
src/soc/intel/common/block/xhci/xhci.c
View File

@ -19,6 +19,7 @@
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <arch/io.h> #include <arch/io.h>
#include <intelblocks/acpi.h>
#include <intelblocks/xhci.h> #include <intelblocks/xhci.h>
__weak void soc_xhci_init(struct device *dev) { /* no-op */ } __weak void soc_xhci_init(struct device *dev) { /* no-op */ }
@ -29,6 +30,8 @@ static struct device_operations usb_xhci_ops = {
.enable_resources = &pci_dev_enable_resources, .enable_resources = &pci_dev_enable_resources,
.init = soc_xhci_init, .init = soc_xhci_init,
.ops_pci = &pci_dev_ops_pci, .ops_pci = &pci_dev_ops_pci,
.scan_bus = &scan_usb_bus,
.acpi_name = &soc_acpi_name,
}; };
static const unsigned short pci_device_ids[] = { static const unsigned short pci_device_ids[] = {

35
src/soc/intel/skylake/acpi.c
View File

@ -717,6 +717,41 @@ const char *soc_acpi_name(const struct device *dev)
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)
return "PCI0"; return "PCI0";
if (dev->path.type == DEVICE_PATH_USB) {
switch (dev->path.usb.port_type) {
case 0:
/* Root Hub */
return "RHUB";
case 2:
/* USB2 ports */
switch (dev->path.usb.port_id) {
case 0: return "HS01";
case 1: return "HS02";
case 2: return "HS03";
case 3: return "HS04";
case 4: return "HS05";
case 5: return "HS06";
case 6: return "HS07";
case 7: return "HS08";
case 8: return "HS09";
case 9: return "HS10";
}
break;
case 3:
/* USB3 ports */
switch (dev->path.usb.port_id) {
case 0: return "SS01";
case 1: return "SS02";
case 2: return "SS03";
case 3: return "SS04";
case 4: return "SS05";
case 5: return "SS06";
}
break;
}
return NULL;
}
if (dev->path.type != DEVICE_PATH_PCI) if (dev->path.type != DEVICE_PATH_PCI)
return NULL; return NULL;