skylake: ACPI: Add functions for PCR access
There are a few places in ACPI that touch PCR registers, either to read a value or to set some magic bits. Expose some functions for this that will keep all the PCR access in one location instead of spread throughout the code. BUG=chrome-os-partner:44622 BRANCH=none TEST=emerge-glados coreboot Change-Id: Iafeb3e2cd8f38af10d29eaaf18f2380c5651fe6d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e78b2801fbc5c00ba452ae5e4ecb07c3e23bf6c1 Original-Change-Id: I2e4d491157f7ac6d2ebc231b11661c059b4a7fa0 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/295904 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11531 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -37,6 +37,8 @@
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/* PCIE Ports */
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#include "pcie.asl"
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/* PCR Access */
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#include "pcr.asl"
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/* Serial IO */
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#include "serialio.asl"
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@ -0,0 +1,75 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Google Inc.
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* Copyright (C) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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/*
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* Calculate PCR register base at specified PID
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* Arg0 - PCR Port ID
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*/
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Method (PCRB, 1, NotSerialized)
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{
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Return (Add (PCH_PCR_BASE_ADDRESS, ShiftLeft (Arg0, PCR_PORTID_SHIFT)))
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}
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/*
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* Read a PCR register at specified PID and offset
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* Arg0 - PCR Port ID
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* Arg1 - Register Offset
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*/
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Method (PCRR, 2, NotSerialized)
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{
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OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4)
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Field (PCRD, DWordAcc, NoLock, Preserve)
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{
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DATA, 32
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}
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Return (DATA)
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}
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/*
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* AND a value with PCR register at specified PID and offset
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* Arg0 - PCR Port ID
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* Arg1 - Register Offset
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* Arg2 - Value to AND
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*/
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Method (PCRA, 3, Serialized)
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{
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OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4)
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Field (PCRD, DWordAcc, NoLock, Preserve)
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{
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DATA, 32
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}
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And (DATA, Arg2, DATA)
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}
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/*
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* OR a value with PCR register at specified PID and offset
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* Arg0 - PCR Port ID
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* Arg1 - Register Offset
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* Arg2 - Value to OR
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*/
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Method (PCRO, 3, Serialized)
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{
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OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4)
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Field (PCRD, DWordAcc, NoLock, Preserve)
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{
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DATA, 32
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}
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Or (DATA, Arg2, DATA)
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}
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