skylake: ACPI: Add functions for PCR access

There are a few places in ACPI that touch PCR registers,
either to read a value or to set some magic bits.

Expose some functions for this that will keep all the PCR
access in one location instead of spread throughout the code.

BUG=chrome-os-partner:44622
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: Iafeb3e2cd8f38af10d29eaaf18f2380c5651fe6d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e78b2801fbc5c00ba452ae5e4ecb07c3e23bf6c1
Original-Change-Id: I2e4d491157f7ac6d2ebc231b11661c059b4a7fa0
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295904
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11531
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2015-08-27 16:03:45 -07:00 committed by Patrick Georgi
parent 86d937fb46
commit bf9df75eac
2 changed files with 77 additions and 0 deletions

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@ -37,6 +37,8 @@
/* PCIE Ports */
#include "pcie.asl"
/* PCR Access */
#include "pcr.asl"
/* Serial IO */
#include "serialio.asl"

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@ -0,0 +1,75 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Google Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc.
*/
/*
* Calculate PCR register base at specified PID
* Arg0 - PCR Port ID
*/
Method (PCRB, 1, NotSerialized)
{
Return (Add (PCH_PCR_BASE_ADDRESS, ShiftLeft (Arg0, PCR_PORTID_SHIFT)))
}
/*
* Read a PCR register at specified PID and offset
* Arg0 - PCR Port ID
* Arg1 - Register Offset
*/
Method (PCRR, 2, NotSerialized)
{
OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4)
Field (PCRD, DWordAcc, NoLock, Preserve)
{
DATA, 32
}
Return (DATA)
}
/*
* AND a value with PCR register at specified PID and offset
* Arg0 - PCR Port ID
* Arg1 - Register Offset
* Arg2 - Value to AND
*/
Method (PCRA, 3, Serialized)
{
OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4)
Field (PCRD, DWordAcc, NoLock, Preserve)
{
DATA, 32
}
And (DATA, Arg2, DATA)
}
/*
* OR a value with PCR register at specified PID and offset
* Arg0 - PCR Port ID
* Arg1 - Register Offset
* Arg2 - Value to OR
*/
Method (PCRO, 3, Serialized)
{
OperationRegion (PCRD, SystemMemory, Add (PCRB (Arg0), Arg1), 4)
Field (PCRD, DWordAcc, NoLock, Preserve)
{
DATA, 32
}
Or (DATA, Arg2, DATA)
}