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intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit 

Changing the UPD param name from "SkipMpInit" to "FspSkipMpInit"

BRANCH=none
BUG=none
TEST=Build and booted in kunimitsu with FspSkipMpInit token
enabled from Coreboot.

Change-Id: I5ebe7a1338ac77a62d5aa2e48e083b4fb906bf28
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cdaa95a82bc7e90637c6b90e33d88d040e085f58
Original-Change-Id: Ibdaa3d202f8f6f6f0ca6c6d4c6428f1616572f1d
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/319353
Original-Commit-Ready: Preetham Chandrian <preetham.chandrian@intel.com>
Original-Tested-by: Preetham Chandrian <preetham.chandrian@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12993
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Barnali Sarkar 2015-12-21 11:45:05 +05:30 committed by Patrick Georgi
parent 8d66665637
commit c019cec4c0
2 changed files with 2 additions and 2 deletions
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2
src/soc/intel/skylake/chip.c
View File

@ -345,7 +345,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->SerialIrqConfigSirqMode = config->SerialIrqConfigSirqMode;
params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse;
params->SkipMpInit = config->SkipMpInit;
params->SkipMpInit = config->FspSkipMpInit;
/*
* To disable Heci, the Psf needs to be left unlocked

2
src/soc/intel/skylake/chip.h
View File

@ -308,7 +308,7 @@ struct soc_intel_skylake_config {
* Values: 0: PchSfpw4Clk, 1: PchSfpw6Clk, 2; PchSfpw8Clk.
*/
u8 SerialIrqConfigStartFramePulse;
u8 SkipMpInit;
u8 FspSkipMpInit;
/* VrConfig Settings for 5 domains
* 0 = System Agent, 1 = IA Core, 2 = Ring,
* 3 = GT unsliced, 4 = GT sliced