mb/google/brya/var/mithrax: Add WiFi SAR table for mithrax

Add WiFi SAR table for mithrax.

BUG=b:231491014
TEST=emerge-brya chromeos-config chromeos-config-bsp-private
coreboot-private-files-baseboard-brya coreboot chromeos-bootimage
and checked SAR table can load by WiFi driver.

Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: I847debd7c817225b5b1777c798a14ef10aee3471
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64541
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
This commit is contained in:
John Su 2022-05-20 14:05:12 +08:00 committed by Felix Held
parent 49ab8e0ced
commit c01e289a0b
3 changed files with 9 additions and 0 deletions

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@ -219,6 +219,7 @@ config BOARD_GOOGLE_OSIRIS
config BOARD_GOOGLE_MITHRAX config BOARD_GOOGLE_MITHRAX
bool "-> Mithrax" bool "-> Mithrax"
select BOARD_GOOGLE_BASEBOARD_BRYA select BOARD_GOOGLE_BASEBOARD_BRYA
select CHROMEOS_WIFI_SAR if CHROMEOS
select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_GENESYSLOGIC_GL9755 select DRIVERS_GENESYSLOGIC_GL9755

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@ -1,3 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
bootblock-y += gpio.c bootblock-y += gpio.c
ramstage-y += gpio.c ramstage-y += gpio.c
ramstage-$(CONFIG_FW_CONFIG) += variant.c

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@ -3,6 +3,12 @@
#include <chip.h> #include <chip.h>
#include <fw_config.h> #include <fw_config.h>
#include <baseboard/variants.h> #include <baseboard/variants.h>
#include <sar.h>
const char *get_wifi_sar_cbfs_filename(void)
{
return "wifi_sar_0.hex";
}
void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{ {