GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

util/inteltool: Support dumping more BARs on Skylake mobile SoCs 

Support dumping MCHBAR, EPBAR, DMIBAR and PCIEXBAR on SKL-U/Y.
These chipsets are similar to others supported by the tool.

Working on SKL-U.

Change-Id: Ic43d54ef189d500701872a56e67781a744990328
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Benjamin Doron 2020-07-01 19:20:40 +00:00 committed by Patrick Georgi
parent 4ab0db2d27
commit c01fa5ad5d
2 changed files with 9 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
util/inteltool/memory.c
View File

@ -207,10 +207,12 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_E: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_E:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y: case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q: case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:

6
util/inteltool/pcie.c
View File

@ -251,6 +251,8 @@ int print_epbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
@ -380,6 +382,8 @@ int print_dmibar(struct pci_dev *nb)
dmibar_phys &= 0x0000007ffffff000UL; /* 38:12 */ dmibar_phys &= 0x0000007ffffff000UL; /* 38:12 */
break; break;
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
@ -493,6 +497,8 @@ int print_pciexbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: