drivers/intel/fsp1_1: Add function to report FSP-T output

This allows to compare the FSP-T output in %ecx and %edx to coreboot's
CAR symbols.

Tested on Facebook FBG1701

Change-Id: Ice748e542180f6e1dc1505e7f37b6b6c68772bda
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Frans Hendriks 2020-11-20 10:52:39 +01:00 committed by Patrick Georgi
parent 335eb1219c
commit c022a79503
4 changed files with 42 additions and 0 deletions

View File

@ -9,6 +9,7 @@ verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c
bootblock-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += cache_as_ram.S
bootblock-y += fsp_util.c
bootblock-y += ../../../cpu/intel/microcode/microcode_asm.S
bootblock-y += fsp_report.c
romstage-y += car.c
romstage-y += fsp_util.c

View File

@ -145,6 +145,14 @@ CAR_init_done:
* mm1: high 32-bits of TSC value
*/
/*
* temp_memory_start/end reside in the .bss section, which gets cleared
* below. Save the FSP return value to the stack before writing those
* variables.
*/
push %ecx
push %edx
/* clear .bss section */
cld
xor %eax, %eax
@ -154,6 +162,11 @@ CAR_init_done:
shrl $2, %ecx
rep stosl
pop %edx
movl %edx, temp_memory_end
pop %ecx
movl %ecx, temp_memory_start
/* Need to align stack to 16 bytes at call instruction. Account for
the pushes below. */
andl $0xfffffff0, %esp

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@ -0,0 +1,27 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/symbols.h>
#include <console/console.h>
#include <fsp/util.h>
/* filled in assembly after FSP-T ran */
uintptr_t temp_memory_start;
uintptr_t temp_memory_end;
void report_fsp_output(void)
{
const struct region fsp_car_region = {
.offset = temp_memory_start,
.size = temp_memory_end - temp_memory_start,
};
const struct region coreboot_car_region = {
.offset = (uintptr_t)_car_region_start,
.size = (uintptr_t)_car_region_size,
};
printk(BIOS_DEBUG, "FSP: reported temp_mem region: [0x%08lx,0x%08lx)\n",
temp_memory_start, temp_memory_end);
if (!region_is_subregion(&fsp_car_region, &coreboot_car_region)) {
printk(BIOS_ERR, "Wrong CAR region used!\n");
printk(BIOS_ERR, "Adapt DCACHE_RAM_BASE and DCACHE_RAM_SIZE to match FSP-T\n");
}
}

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@ -31,6 +31,7 @@ void *get_next_resource_hob(const EFI_GUID *guid, const void *hob_start);
void *get_first_resource_hob(const EFI_GUID *guid);
void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
uint64_t new);
void report_fsp_output(void);
/* Return version of FSP associated with fih. */
static inline uint32_t fsp_version(FSP_INFO_HEADER *fih)