purin: add ns16550 driver
BUG=chrome-os-partner:35807 BRANCH=broadcom-firmware TEST=booted b0 board. messages printed on console: coreboot-bcf5dc0-dirty bootblock Mon Feb 9 13:33:55 PST 2015 starting... Exception handlers installed. Change-Id: I271ead2f4fe48b809fd311acd5a27a675dce549e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ddff8fb170e775a121150fce065410d2925ad18c Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ia6e82fa89547d61745c1473f723897dc3c1296ef Original-Reviewed-on: https://chromium-review.googlesource.com/251301 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9765 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
This commit is contained in:
Daisuke Nojiri
Patrick Georgi
parent
3a2ac88e40
commit
c047b107ec
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@ -39,4 +39,9 @@ config BOOTBLOCK_CPU_INIT
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string
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default "soc/broadcom/cygnus/bootblock.c"
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config CONSOLE_SERIAL_UART_ADDRESS
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hex
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depends on CONSOLE_SERIAL_UART
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default 0x18023000
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endif
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@ -1,7 +1,7 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Google Inc.
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## Copyright 2015 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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@ -22,13 +22,15 @@ bootblock-y += cbmem.c
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bootblock-y += i2c.c
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bootblock-y += timer.c
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bootblock-$(CONFIG_SPI_FLASH) += spi.c
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bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += ns16550.c
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endif
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verstage-y += verstage.c
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verstage-y += i2c.c
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verstage-y += timer.c
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verstage-$(CONFIG_SPI_FLASH) += spi.c
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verstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
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verstage-$(CONFIG_DRIVERS_UART) += ns16550.c
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romstage-y += cbmem.c
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romstage-y += i2c.c
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@ -36,13 +38,13 @@ romstage-y += timer.c
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romstage-y += romstage.c
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romstage-y += sdram.c
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romstage-$(CONFIG_SPI_FLASH) += spi.c
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romstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
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romstage-$(CONFIG_DRIVERS_UART) += ns16550.c
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ramstage-y += cbmem.c
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ramstage-y += i2c.c
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ramstage-y += timer.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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ramstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
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ramstage-$(CONFIG_DRIVERS_UART) += ns16550.c
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CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/
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@ -1,81 +1,61 @@
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/*
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* NS16550 Serial Port
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* originally from linux source (arch/powerpc/boot/ns16550.h)
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* This file is part of the coreboot project.
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*
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* Cleanup and unification
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* (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH
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* Copyright (C) 2000 Flying Pig Systems
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* Copyright (C) 2005 Wind River Systems
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* Copyright (C) 2009 DENX Software Engineering GmbH
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* Copyright (C) 2015 Google Inc.
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*
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* modified slightly to
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* have addresses as offsets from CONFIG_SYS_ISA_BASE
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* added a few more definitions
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* added prototypes for ns16550.c
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* reduced no of com ports to 2
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* modifications (c) Rob Taylor, Flying Pig Systems. 2000.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* added support for port on 64-bit bus
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* by Richard Danter (richard.danter@windriver.com), (C) 2005 Wind River Systems
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Note that the following macro magic uses the fact that the compiler
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* will not allocate storage for arrays of size 0
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*/
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#include <stdint.h>
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#include <linux/types.h>
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#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0)
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#error "Please define NS16550 registers size."
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#elif defined(CONFIG_SYS_NS16550_MEM32)
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#define UART_REG(x) u32 x
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#elif (CONFIG_SYS_NS16550_REG_SIZE > 0)
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#define UART_REG(x) \
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unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \
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unsigned char x;
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#elif (CONFIG_SYS_NS16550_REG_SIZE < 0)
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#define UART_REG(x) \
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unsigned char x; \
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unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
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#endif
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struct NS16550 {
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UART_REG(rbr); /* 0 */
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UART_REG(ier); /* 1 */
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UART_REG(fcr); /* 2 */
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UART_REG(lcr); /* 3 */
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UART_REG(mcr); /* 4 */
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UART_REG(lsr); /* 5 */
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UART_REG(msr); /* 6 */
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UART_REG(spr); /* 7 */
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#ifdef CONFIG_SOC_DA8XX
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UART_REG(reg8); /* 8 */
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UART_REG(reg9); /* 9 */
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UART_REG(revid1); /* A */
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UART_REG(revid2); /* B */
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UART_REG(pwr_mgmt); /* C */
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UART_REG(mdr1); /* D */
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#else
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UART_REG(mdr1); /* 8 */
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UART_REG(reg9); /* 9 */
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UART_REG(regA); /* A */
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UART_REG(regB); /* B */
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UART_REG(regC); /* C */
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UART_REG(regD); /* D */
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UART_REG(regE); /* E */
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UART_REG(uasr); /* F */
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UART_REG(scr); /* 10*/
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UART_REG(ssr); /* 11*/
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UART_REG(reg12); /* 12*/
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UART_REG(osc_12m_sel); /* 13*/
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#endif
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struct ns16550 {
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union {
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uint32_t thr; /* Transmit holding register. */
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uint32_t rbr; /* Receive buffer register. */
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uint32_t dll; /* Divisor latch lsb. */
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};
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union {
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uint32_t ier; /* Interrupt enable register. */
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uint32_t dlm; /* Divisor latch msb. */
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};
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union {
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uint32_t iir; /* Interrupt identification register. */
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uint32_t fcr; /* FIFO control register. */
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};
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uint32_t lcr; /* 3 */
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uint32_t mcr; /* 4 */
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uint32_t lsr; /* 5 */
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uint32_t msr; /* 6 */
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uint32_t spr; /* 7 */
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uint32_t mdr1; /* 8 */
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uint32_t reg9; /* 9 */
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uint32_t regA; /* A */
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uint32_t regB; /* B */
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uint32_t regC; /* C */
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uint32_t regD; /* D */
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uint32_t regE; /* E */
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uint32_t uasr; /* F */
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uint32_t scr; /* 10*/
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uint32_t ssr; /* 11*/
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uint32_t reg12; /* 12*/
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uint32_t osc_12m_sel; /* 13*/
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};
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#define thr rbr
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#define iir fcr
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#define dll rbr
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#define dlm ier
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typedef struct NS16550 *NS16550_t;
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/*
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* These are the definitions for the FIFO Control Register
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*/
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@ -163,16 +143,5 @@ typedef struct NS16550 *NS16550_t;
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#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
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#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
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#ifdef CONFIG_OMAP1510
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#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */
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#endif
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/* useful defaults for LCR */
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/* useful defaults for LCR: 8 data, 1 stop, no parity */
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#define UART_LCR_8N1 0x03
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void NS16550_init(NS16550_t com_port, int baud_divisor);
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void NS16550_putc(NS16550_t com_port, char c);
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char NS16550_getc(NS16550_t com_port);
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int NS16550_tstc(NS16550_t com_port);
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void NS16550_reinit(NS16550_t com_port, int baud_divisor);
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@ -1,301 +1,131 @@
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/*
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* (C) Copyright 2000
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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* This file is part of the coreboot project.
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*
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* SPDX-License-Identifier: GPL-2.0+
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* Copyright (C) 2000 Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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* Copyright (C) Broadcom Corporation
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* Copyright (C) 2015 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <common.h>
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#include <linux/compiler.h>
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#include <arch/io.h>
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#include <boot/coreboot_tables.h>
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#include <console/console.h> /* for __console definition */
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#include <console/uart.h>
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#include <delay.h>
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#include <soc/ns16550.h>
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#include <ns16550.h>
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#ifdef CONFIG_NS87308
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#include <ns87308.h>
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#endif
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#define SYS_NS16550_CLK 100000000
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#define SYS_NS16550_BAUDRATE 115200
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#define MODE_X_DIV 16
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#define SINGLE_CHAR_TIMEOUT (50 * 1000)
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#include <serial.h>
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static struct ns16550 * const regs =
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(void *)CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
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#ifndef CONFIG_NS16550_MIN_FUNCTIONS
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DECLARE_GLOBAL_DATA_PTR;
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#if !defined(CONFIG_CONS_INDEX)
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#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 6)
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#error "Invalid console index value."
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#endif
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#if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1)
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#error "Console port 1 defined but not configured."
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#elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2)
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#error "Console port 2 defined but not configured."
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#elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3)
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#error "Console port 3 defined but not configured."
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#elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4)
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#error "Console port 4 defined but not configured."
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#elif CONFIG_CONS_INDEX == 5 && !defined(CONFIG_SYS_NS16550_COM5)
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#error "Console port 5 defined but not configured."
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#elif CONFIG_CONS_INDEX == 6 && !defined(CONFIG_SYS_NS16550_COM6)
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#error "Console port 6 defined but not configured."
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#endif
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/* Note: The port number specified in the functions is 1 based.
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* the array is 0 based.
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*/
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static NS16550_t serial_ports[6] = {
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#ifdef CONFIG_SYS_NS16550_COM1
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(NS16550_t)CONFIG_SYS_NS16550_COM1,
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#else
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NULL,
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#endif
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#ifdef CONFIG_SYS_NS16550_COM2
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(NS16550_t)CONFIG_SYS_NS16550_COM2,
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#else
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NULL,
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#endif
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#ifdef CONFIG_SYS_NS16550_COM3
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(NS16550_t)CONFIG_SYS_NS16550_COM3,
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#else
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NULL,
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#endif
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#ifdef CONFIG_SYS_NS16550_COM4
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(NS16550_t)CONFIG_SYS_NS16550_COM4,
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#else
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NULL,
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#endif
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#ifdef CONFIG_SYS_NS16550_COM5
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(NS16550_t)CONFIG_SYS_NS16550_COM5,
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#else
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NULL,
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#endif
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#ifdef CONFIG_SYS_NS16550_COM6
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(NS16550_t)CONFIG_SYS_NS16550_COM6
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#else
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NULL
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#endif
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};
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#define PORT serial_ports[port-1]
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/* Multi serial device functions */
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#define DECLARE_ESERIAL_FUNCTIONS(port) \
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static int eserial##port##_init(void) \
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{ \
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int clock_divisor; \
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clock_divisor = calc_divisor(serial_ports[port-1]); \
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NS16550_init(serial_ports[port-1], clock_divisor); \
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return 0 ; \
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} \
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static void eserial##port##_setbrg(void) \
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{ \
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serial_setbrg_dev(port); \
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} \
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static int eserial##port##_getc(void) \
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{ \
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return serial_getc_dev(port); \
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} \
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static int eserial##port##_tstc(void) \
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{ \
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return serial_tstc_dev(port); \
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} \
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static void eserial##port##_putc(const char c) \
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{ \
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serial_putc_dev(port, c); \
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} \
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static void eserial##port##_puts(const char *s) \
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{ \
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serial_puts_dev(port, s); \
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}
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/* Serial device descriptor */
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#define INIT_ESERIAL_STRUCTURE(port, __name) { \
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.name = __name, \
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.start = eserial##port##_init, \
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.stop = NULL, \
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.setbrg = eserial##port##_setbrg, \
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.getc = eserial##port##_getc, \
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.tstc = eserial##port##_tstc, \
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.putc = eserial##port##_putc, \
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.puts = eserial##port##_puts, \
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}
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int calc_divisor(NS16550_t port)
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static int calc_divisor(void)
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{
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#ifdef CONFIG_OMAP1510
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/* If can't cleanly clock 115200 set div to 1 */
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if ((CONFIG_SYS_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
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port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
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return (1); /* return 1 for base divisor */
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}
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port->osc_12m_sel = 0; /* clear if previsouly set */
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#endif
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#ifdef CONFIG_OMAP1610
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/* If can't cleanly clock 115200 set div to 1 */
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if ((CONFIG_SYS_NS16550_CLK == 48000000) && (gd->baudrate == 115200)) {
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return (26); /* return 26 for base divisor */
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}
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#endif
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#define MODE_X_DIV 16
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/* Compute divisor value. Normally, we should simply return:
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* CONFIG_SYS_NS16550_CLK) / MODE_X_DIV / gd->baudrate
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* ns16550_clk / MODE_X_DIV / baudrate
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* but we need to round that value by adding 0.5.
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* Rounding is especially important at high baud rates.
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*/
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return (CONFIG_SYS_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) /
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(MODE_X_DIV * gd->baudrate);
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int div = MODE_X_DIV * SYS_NS16550_BAUDRATE;
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return (SYS_NS16550_CLK + div / 2) / div;
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}
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void
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_serial_putc(const char c,const int port)
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static void ns16550_init(void)
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{
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if (c == '\n')
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NS16550_putc(PORT, '\r');
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int baud_divisor = calc_divisor();
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NS16550_putc(PORT, c);
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while (!(readl(®s->lsr) & UART_LSR_TEMT))
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;
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writel(0, ®s->ier);
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writel(UART_LCR_BKSE | UART_LCR_8N1, ®s->lcr);
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writel(0, ®s->dll);
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writel(0, ®s->dlm);
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writel(UART_LCR_8N1, ®s->lcr);
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writel(UART_MCR_DTR | UART_MCR_RTS, ®s->mcr);
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/* clear & enable FIFOs */
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writel(UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR, ®s->fcr);
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writel(UART_LCR_BKSE | UART_LCR_8N1, ®s->lcr);
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writel(baud_divisor & 0xff, ®s->dll);
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writel((baud_divisor >> 8) & 0xff, ®s->dlm);
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writel(UART_LCR_8N1, ®s->lcr);
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}
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void
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_serial_putc_raw(const char c,const int port)
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static void ns16550_tx_byte(unsigned char data)
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{
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NS16550_putc(PORT, c);
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while ((readl(®s->lsr) & UART_LSR_THRE) == 0)
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;
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||||
writel(data, ®s->thr);
|
||||
}
|
||||
|
||||
void
|
||||
_serial_puts (const char *s,const int port)
|
||||
static void ns16550_tx_flush(void)
|
||||
{
|
||||
while (*s) {
|
||||
_serial_putc (*s++,port);
|
||||
}
|
||||
while (!(readl(®s->lsr) & UART_LSR_TEMT))
|
||||
;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
_serial_getc(const int port)
|
||||
static int ns16550_tst_byte(void)
|
||||
{
|
||||
return NS16550_getc(PORT);
|
||||
return (readl(®s->lsr) & UART_LSR_DR) != 0;
|
||||
}
|
||||
|
||||
int
|
||||
_serial_tstc(const int port)
|
||||
static unsigned char ns16550_rx_byte(void)
|
||||
{
|
||||
return NS16550_tstc(PORT);
|
||||
unsigned long int i = SINGLE_CHAR_TIMEOUT;
|
||||
while (i-- && !ns16550_tst_byte())
|
||||
udelay(1);
|
||||
if (i)
|
||||
return readl(®s->rbr);
|
||||
else
|
||||
return 0x0;
|
||||
}
|
||||
|
||||
void
|
||||
_serial_setbrg (const int port)
|
||||
void uart_init(int idx)
|
||||
{
|
||||
int clock_divisor;
|
||||
|
||||
clock_divisor = calc_divisor(PORT);
|
||||
NS16550_reinit(PORT, clock_divisor);
|
||||
ns16550_init();
|
||||
}
|
||||
|
||||
static inline void
|
||||
serial_putc_dev(unsigned int dev_index,const char c)
|
||||
void uart_tx_byte(int idx, unsigned char data)
|
||||
{
|
||||
_serial_putc(c,dev_index);
|
||||
ns16550_tx_byte(data);
|
||||
}
|
||||
|
||||
static inline void
|
||||
serial_putc_raw_dev(unsigned int dev_index,const char c)
|
||||
void uart_tx_flush(int idx)
|
||||
{
|
||||
_serial_putc_raw(c,dev_index);
|
||||
ns16550_tx_flush();
|
||||
}
|
||||
|
||||
static inline void
|
||||
serial_puts_dev(unsigned int dev_index,const char *s)
|
||||
unsigned char uart_rx_byte(int idx)
|
||||
{
|
||||
_serial_puts(s,dev_index);
|
||||
return ns16550_rx_byte();
|
||||
}
|
||||
|
||||
static inline int
|
||||
serial_getc_dev(unsigned int dev_index)
|
||||
#ifndef __PRE_RAM__
|
||||
void uart_fill_lb(void *data)
|
||||
{
|
||||
return _serial_getc(dev_index);
|
||||
}
|
||||
struct lb_serial serial;
|
||||
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
|
||||
serial.baseaddr = (uintptr_t)regs;
|
||||
serial.baud = default_baudrate();
|
||||
serial.regwidth = 1;
|
||||
lb_add_serial(&serial, data);
|
||||
|
||||
static inline int
|
||||
serial_tstc_dev(unsigned int dev_index)
|
||||
{
|
||||
return _serial_tstc(dev_index);
|
||||
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
|
||||
}
|
||||
|
||||
static inline void
|
||||
serial_setbrg_dev(unsigned int dev_index)
|
||||
{
|
||||
_serial_setbrg(dev_index);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_SYS_NS16550_COM1)
|
||||
DECLARE_ESERIAL_FUNCTIONS(1);
|
||||
struct serial_device eserial1_device =
|
||||
INIT_ESERIAL_STRUCTURE(1, "eserial0");
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM2)
|
||||
DECLARE_ESERIAL_FUNCTIONS(2);
|
||||
struct serial_device eserial2_device =
|
||||
INIT_ESERIAL_STRUCTURE(2, "eserial1");
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM3)
|
||||
DECLARE_ESERIAL_FUNCTIONS(3);
|
||||
struct serial_device eserial3_device =
|
||||
INIT_ESERIAL_STRUCTURE(3, "eserial2");
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM4)
|
||||
DECLARE_ESERIAL_FUNCTIONS(4);
|
||||
struct serial_device eserial4_device =
|
||||
INIT_ESERIAL_STRUCTURE(4, "eserial3");
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM5)
|
||||
DECLARE_ESERIAL_FUNCTIONS(5);
|
||||
struct serial_device eserial5_device =
|
||||
INIT_ESERIAL_STRUCTURE(5, "eserial4");
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM6)
|
||||
DECLARE_ESERIAL_FUNCTIONS(6);
|
||||
struct serial_device eserial6_device =
|
||||
INIT_ESERIAL_STRUCTURE(6, "eserial5");
|
||||
#endif
|
||||
|
||||
__weak struct serial_device *default_serial_console(void)
|
||||
{
|
||||
#if CONFIG_CONS_INDEX == 1
|
||||
return &eserial1_device;
|
||||
#elif CONFIG_CONS_INDEX == 2
|
||||
return &eserial2_device;
|
||||
#elif CONFIG_CONS_INDEX == 3
|
||||
return &eserial3_device;
|
||||
#elif CONFIG_CONS_INDEX == 4
|
||||
return &eserial4_device;
|
||||
#elif CONFIG_CONS_INDEX == 5
|
||||
return &eserial5_device;
|
||||
#elif CONFIG_CONS_INDEX == 6
|
||||
return &eserial6_device;
|
||||
#else
|
||||
#error "Bad CONFIG_CONS_INDEX."
|
||||
#endif
|
||||
}
|
||||
|
||||
void ns16550_serial_initialize(void)
|
||||
{
|
||||
#if defined(CONFIG_SYS_NS16550_COM1)
|
||||
serial_register(&eserial1_device);
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM2)
|
||||
serial_register(&eserial2_device);
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM3)
|
||||
serial_register(&eserial3_device);
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM4)
|
||||
serial_register(&eserial4_device);
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM5)
|
||||
serial_register(&eserial5_device);
|
||||
#endif
|
||||
#if defined(CONFIG_SYS_NS16550_COM6)
|
||||
serial_register(&eserial6_device);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_NS16550_MIN_FUNCTIONS */
|
||||
|
|
|
|||
|
|
@ -1,42 +0,0 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright 2015 Google Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <boot/coreboot_tables.h>
|
||||
#include <console/uart.h>
|
||||
|
||||
void uart_init(int idx)
|
||||
{
|
||||
}
|
||||
|
||||
void uart_tx_byte(int idx, unsigned char data)
|
||||
{
|
||||
}
|
||||
|
||||
void uart_tx_flush(int idx)
|
||||
{
|
||||
}
|
||||
|
||||
unsigned char uart_rx_byte(int idx)
|
||||
{
|
||||
return '\0';
|
||||
}
|
||||
|
||||
void uart_fill_lb(void *data)
|
||||
{
|
||||
}
|
||||
Loading…
Reference in New Issue