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purin: add ns16550 driver 

BUG=chrome-os-partner:35807
BRANCH=broadcom-firmware
TEST=booted b0 board. messages printed on console:

coreboot-bcf5dc0-dirty bootblock Mon Feb  9 13:33:55 PST 2015 starting...
Exception handlers installed.

Change-Id: I271ead2f4fe48b809fd311acd5a27a675dce549e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ddff8fb170e775a121150fce065410d2925ad18c
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: Ia6e82fa89547d61745c1473f723897dc3c1296ef
Original-Reviewed-on: https://chromium-review.googlesource.com/251301
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9765
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
This commit is contained in:
Daisuke Nojiri 2015-01-23 10:02:24 -08:00 committed by Patrick Georgi
parent 3a2ac88e40
commit c047b107ec
5 changed files with 147 additions and 383 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/soc/broadcom/cygnus/Kconfig
View File

@ -39,4 +39,9 @@ config BOOTBLOCK_CPU_INIT
string string
default "soc/broadcom/cygnus/bootblock.c" default "soc/broadcom/cygnus/bootblock.c"
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL_UART
default 0x18023000
endif endif

12
src/soc/broadcom/cygnus/Makefile.inc
View File

@ -1,7 +1,7 @@
## ##
## This file is part of the coreboot project. ## This file is part of the coreboot project.
## ##
## Copyright 2014 Google Inc. ## Copyright 2015 Google Inc.
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -22,13 +22,15 @@ bootblock-y += cbmem.c
bootblock-y += i2c.c bootblock-y += i2c.c
bootblock-y += timer.c bootblock-y += timer.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += ns16550.c
endif
verstage-y += verstage.c verstage-y += verstage.c
verstage-y += i2c.c verstage-y += i2c.c
verstage-y += timer.c verstage-y += timer.c
verstage-$(CONFIG_SPI_FLASH) += spi.c verstage-$(CONFIG_SPI_FLASH) += spi.c
verstage-$(CONFIG_CONSOLE_SERIAL) += uart.c verstage-$(CONFIG_DRIVERS_UART) += ns16550.c
romstage-y += cbmem.c romstage-y += cbmem.c
romstage-y += i2c.c romstage-y += i2c.c
@ -36,13 +38,13 @@ romstage-y += timer.c
romstage-y += romstage.c romstage-y += romstage.c
romstage-y += sdram.c romstage-y += sdram.c
romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-$(CONFIG_CONSOLE_SERIAL) += uart.c romstage-$(CONFIG_DRIVERS_UART) += ns16550.c
ramstage-y += cbmem.c ramstage-y += cbmem.c
ramstage-y += i2c.c ramstage-y += i2c.c
ramstage-y += timer.c ramstage-y += timer.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-$(CONFIG_CONSOLE_SERIAL) += uart.c ramstage-$(CONFIG_DRIVERS_UART) += ns16550.c
CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/ CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/

131
src/soc/broadcom/cygnus/include/soc/ns16550.h
View File

@ -1,80 +1,60 @@
/* /*
* NS16550 Serial Port * This file is part of the coreboot project.
* originally from linux source (arch/powerpc/boot/ns16550.h)
* *
* Cleanup and unification * Copyright (C) 2000 Flying Pig Systems
* (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH * Copyright (C) 2005 Wind River Systems
* Copyright (C) 2009 DENX Software Engineering GmbH
* Copyright (C) 2015 Google Inc.
* *
* modified slightly to * This program is free software; you can redistribute it and/or modify
* have addresses as offsets from CONFIG_SYS_ISA_BASE * it under the terms of the GNU General Public License as published by
* added a few more definitions * the Free Software Foundation; either version 2 of the License, or
* added prototypes for ns16550.c * (at your option) any later version.
* reduced no of com ports to 2
* modifications (c) Rob Taylor, Flying Pig Systems. 2000.
* *
* added support for port on 64-bit bus * This program is distributed in the hope that it will be useful,
* by Richard Danter (richard.danter@windriver.com), (C) 2005 Wind River Systems * but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
/* #include <stdint.h>
* Note that the following macro magic uses the fact that the compiler
* will not allocate storage for arrays of size 0
*/
#include <linux/types.h> struct ns16550 {
union {
#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) uint32_t thr; /* Transmit holding register. */
#error "Please define NS16550 registers size." uint32_t rbr; /* Receive buffer register. */
#elif defined(CONFIG_SYS_NS16550_MEM32) uint32_t dll; /* Divisor latch lsb. */
#define UART_REG(x) u32 x };
#elif (CONFIG_SYS_NS16550_REG_SIZE > 0) union {
#define UART_REG(x) \ uint32_t ier; /* Interrupt enable register. */
unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \ uint32_t dlm; /* Divisor latch msb. */
unsigned char x; };
#elif (CONFIG_SYS_NS16550_REG_SIZE < 0) union {
#define UART_REG(x) \ uint32_t iir; /* Interrupt identification register. */
unsigned char x; \ uint32_t fcr; /* FIFO control register. */
unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1]; };
#endif uint32_t lcr; /* 3 */
uint32_t mcr; /* 4 */
struct NS16550 { uint32_t lsr; /* 5 */
UART_REG(rbr); /* 0 */ uint32_t msr; /* 6 */
UART_REG(ier); /* 1 */ uint32_t spr; /* 7 */
UART_REG(fcr); /* 2 */ uint32_t mdr1; /* 8 */
UART_REG(lcr); /* 3 */ uint32_t reg9; /* 9 */
UART_REG(mcr); /* 4 */ uint32_t regA; /* A */
UART_REG(lsr); /* 5 */ uint32_t regB; /* B */
UART_REG(msr); /* 6 */ uint32_t regC; /* C */
UART_REG(spr); /* 7 */ uint32_t regD; /* D */
#ifdef CONFIG_SOC_DA8XX uint32_t regE; /* E */
UART_REG(reg8); /* 8 */ uint32_t uasr; /* F */
UART_REG(reg9); /* 9 */ uint32_t scr; /* 10*/
UART_REG(revid1); /* A */ uint32_t ssr; /* 11*/
UART_REG(revid2); /* B */ uint32_t reg12; /* 12*/
UART_REG(pwr_mgmt); /* C */ uint32_t osc_12m_sel; /* 13*/
UART_REG(mdr1); /* D */
#else
UART_REG(mdr1); /* 8 */
UART_REG(reg9); /* 9 */
UART_REG(regA); /* A */
UART_REG(regB); /* B */
UART_REG(regC); /* C */
UART_REG(regD); /* D */
UART_REG(regE); /* E */
UART_REG(uasr); /* F */
UART_REG(scr); /* 10*/
UART_REG(ssr); /* 11*/
UART_REG(reg12); /* 12*/
UART_REG(osc_12m_sel); /* 13*/
#endif
}; };
#define thr rbr
#define iir fcr
#define dll rbr
#define dlm ier
typedef struct NS16550 *NS16550_t;
/* /*
* These are the definitions for the FIFO Control Register * These are the definitions for the FIFO Control Register
@ -163,16 +143,5 @@ typedef struct NS16550 *NS16550_t;
#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ #define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
/* useful defaults for LCR: 8 data, 1 stop, no parity */
#ifdef CONFIG_OMAP1510
#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */
#endif
/* useful defaults for LCR */
#define UART_LCR_8N1 0x03 #define UART_LCR_8N1 0x03
void NS16550_init(NS16550_t com_port, int baud_divisor);
void NS16550_putc(NS16550_t com_port, char c);
char NS16550_getc(NS16550_t com_port);
int NS16550_tstc(NS16550_t com_port);
void NS16550_reinit(NS16550_t com_port, int baud_divisor);

344
src/soc/broadcom/cygnus/ns16550.c
View File

@ -1,301 +1,131 @@
/* /*
* (C) Copyright 2000 * This file is part of the coreboot project.
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
* *
* SPDX-License-Identifier: GPL-2.0+ * Copyright (C) 2000 Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
* Copyright (C) Broadcom Corporation
* Copyright (C) 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <common.h> #include <arch/io.h>
#include <linux/compiler.h> #include <boot/coreboot_tables.h>
#include <console/console.h> /* for __console definition */
#include <ns16550.h> #include <console/uart.h>
#ifdef CONFIG_NS87308 #include <delay.h>
#include <ns87308.h> #include <soc/ns16550.h>
#endif
#include <serial.h>
#ifndef CONFIG_NS16550_MIN_FUNCTIONS
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_CONS_INDEX)
#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 6)
#error "Invalid console index value."
#endif
#if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1)
#error "Console port 1 defined but not configured."
#elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2)
#error "Console port 2 defined but not configured."
#elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3)
#error "Console port 3 defined but not configured."
#elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4)
#error "Console port 4 defined but not configured."
#elif CONFIG_CONS_INDEX == 5 && !defined(CONFIG_SYS_NS16550_COM5)
#error "Console port 5 defined but not configured."
#elif CONFIG_CONS_INDEX == 6 && !defined(CONFIG_SYS_NS16550_COM6)
#error "Console port 6 defined but not configured."
#endif
/* Note: The port number specified in the functions is 1 based.
* the array is 0 based.
*/
static NS16550_t serial_ports[6] = {
#ifdef CONFIG_SYS_NS16550_COM1
(NS16550_t)CONFIG_SYS_NS16550_COM1,
#else
NULL,
#endif
#ifdef CONFIG_SYS_NS16550_COM2
(NS16550_t)CONFIG_SYS_NS16550_COM2,
#else
NULL,
#endif
#ifdef CONFIG_SYS_NS16550_COM3
(NS16550_t)CONFIG_SYS_NS16550_COM3,
#else
NULL,
#endif
#ifdef CONFIG_SYS_NS16550_COM4
(NS16550_t)CONFIG_SYS_NS16550_COM4,
#else
NULL,
#endif
#ifdef CONFIG_SYS_NS16550_COM5
(NS16550_t)CONFIG_SYS_NS16550_COM5,
#else
NULL,
#endif
#ifdef CONFIG_SYS_NS16550_COM6
(NS16550_t)CONFIG_SYS_NS16550_COM6
#else
NULL
#endif
};
#define PORT serial_ports[port-1]
/* Multi serial device functions */
#define DECLARE_ESERIAL_FUNCTIONS(port) \
static int eserial##port##_init(void) \
{ \
int clock_divisor; \
clock_divisor = calc_divisor(serial_ports[port-1]); \
NS16550_init(serial_ports[port-1], clock_divisor); \
return 0 ; \
} \
static void eserial##port##_setbrg(void) \
{ \
serial_setbrg_dev(port); \
} \
static int eserial##port##_getc(void) \
{ \
return serial_getc_dev(port); \
} \
static int eserial##port##_tstc(void) \
{ \
return serial_tstc_dev(port); \
} \
static void eserial##port##_putc(const char c) \
{ \
serial_putc_dev(port, c); \
} \
static void eserial##port##_puts(const char *s) \
{ \
serial_puts_dev(port, s); \
}
/* Serial device descriptor */
#define INIT_ESERIAL_STRUCTURE(port, __name) { \
.name = __name, \
.start = eserial##port##_init, \
.stop = NULL, \
.setbrg = eserial##port##_setbrg, \
.getc = eserial##port##_getc, \
.tstc = eserial##port##_tstc, \
.putc = eserial##port##_putc, \
.puts = eserial##port##_puts, \
}
int calc_divisor(NS16550_t port)
{
#ifdef CONFIG_OMAP1510
/* If can't cleanly clock 115200 set div to 1 */
if ((CONFIG_SYS_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
return (1); /* return 1 for base divisor */
}
port->osc_12m_sel = 0; /* clear if previsouly set */
#endif
#ifdef CONFIG_OMAP1610
/* If can't cleanly clock 115200 set div to 1 */
if ((CONFIG_SYS_NS16550_CLK == 48000000) && (gd->baudrate == 115200)) {
return (26); /* return 26 for base divisor */
}
#endif
#define SYS_NS16550_CLK 100000000
#define SYS_NS16550_BAUDRATE 115200
#define MODE_X_DIV 16 #define MODE_X_DIV 16
#define SINGLE_CHAR_TIMEOUT (50 * 1000)
static struct ns16550 * const regs =
(void *)CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
static int calc_divisor(void)
{
/* Compute divisor value. Normally, we should simply return: /* Compute divisor value. Normally, we should simply return:
* CONFIG_SYS_NS16550_CLK) / MODE_X_DIV / gd->baudrate * ns16550_clk / MODE_X_DIV / baudrate
* but we need to round that value by adding 0.5. * but we need to round that value by adding 0.5.
* Rounding is especially important at high baud rates. * Rounding is especially important at high baud rates.
*/ */
return (CONFIG_SYS_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) / int div = MODE_X_DIV * SYS_NS16550_BAUDRATE;
(MODE_X_DIV * gd->baudrate); return (SYS_NS16550_CLK + div / 2) / div;
} }
void static void ns16550_init(void)
_serial_putc(const char c,const int port)
{ {
if (c == '\n') int baud_divisor = calc_divisor();
NS16550_putc(PORT, '\r');
NS16550_putc(PORT, c); while (!(readl(&regs->lsr) & UART_LSR_TEMT))
;
writel(0, &regs->ier);
writel(UART_LCR_BKSE | UART_LCR_8N1, &regs->lcr);
writel(0, &regs->dll);
writel(0, &regs->dlm);
writel(UART_LCR_8N1, &regs->lcr);
writel(UART_MCR_DTR | UART_MCR_RTS, &regs->mcr);
/* clear & enable FIFOs */
writel(UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR, &regs->fcr);
writel(UART_LCR_BKSE | UART_LCR_8N1, &regs->lcr);
writel(baud_divisor & 0xff, &regs->dll);
writel((baud_divisor >> 8) & 0xff, &regs->dlm);
writel(UART_LCR_8N1, &regs->lcr);
} }
void static void ns16550_tx_byte(unsigned char data)
_serial_putc_raw(const char c,const int port)
{ {
NS16550_putc(PORT, c); while ((readl(&regs->lsr) & UART_LSR_THRE) == 0)
;
writel(data, &regs->thr);
} }
void static void ns16550_tx_flush(void)
_serial_puts (const char *s,const int port)
{ {
while (*s) { while (!(readl(&regs->lsr) & UART_LSR_TEMT))
_serial_putc (*s++,port); ;
}
} }
static int ns16550_tst_byte(void)
int
_serial_getc(const int port)
{ {
return NS16550_getc(PORT); return (readl(&regs->lsr) & UART_LSR_DR) != 0;
} }
int static unsigned char ns16550_rx_byte(void)
_serial_tstc(const int port)
{ {
return NS16550_tstc(PORT); unsigned long int i = SINGLE_CHAR_TIMEOUT;
while (i-- && !ns16550_tst_byte())
udelay(1);
if (i)
return readl(&regs->rbr);
else
return 0x0;
} }
void void uart_init(int idx)
_serial_setbrg (const int port)
{ {
int clock_divisor; ns16550_init();
clock_divisor = calc_divisor(PORT);
NS16550_reinit(PORT, clock_divisor);
} }
static inline void void uart_tx_byte(int idx, unsigned char data)
serial_putc_dev(unsigned int dev_index,const char c)
{ {
_serial_putc(c,dev_index); ns16550_tx_byte(data);
} }
static inline void void uart_tx_flush(int idx)
serial_putc_raw_dev(unsigned int dev_index,const char c)
{ {
_serial_putc_raw(c,dev_index); ns16550_tx_flush();
} }
static inline void unsigned char uart_rx_byte(int idx)
serial_puts_dev(unsigned int dev_index,const char *s)
{ {
_serial_puts(s,dev_index); return ns16550_rx_byte();
} }
static inline int #ifndef __PRE_RAM__
serial_getc_dev(unsigned int dev_index) void uart_fill_lb(void *data)
{ {
return _serial_getc(dev_index); struct lb_serial serial;
} serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = (uintptr_t)regs;
serial.baud = default_baudrate();
serial.regwidth = 1;
lb_add_serial(&serial, data);
static inline int lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
serial_tstc_dev(unsigned int dev_index)
{
return _serial_tstc(dev_index);
} }
static inline void
serial_setbrg_dev(unsigned int dev_index)
{
_serial_setbrg(dev_index);
}
#if defined(CONFIG_SYS_NS16550_COM1)
DECLARE_ESERIAL_FUNCTIONS(1);
struct serial_device eserial1_device =
INIT_ESERIAL_STRUCTURE(1, "eserial0");
#endif #endif
#if defined(CONFIG_SYS_NS16550_COM2)
DECLARE_ESERIAL_FUNCTIONS(2);
struct serial_device eserial2_device =
INIT_ESERIAL_STRUCTURE(2, "eserial1");
#endif
#if defined(CONFIG_SYS_NS16550_COM3)
DECLARE_ESERIAL_FUNCTIONS(3);
struct serial_device eserial3_device =
INIT_ESERIAL_STRUCTURE(3, "eserial2");
#endif
#if defined(CONFIG_SYS_NS16550_COM4)
DECLARE_ESERIAL_FUNCTIONS(4);
struct serial_device eserial4_device =
INIT_ESERIAL_STRUCTURE(4, "eserial3");
#endif
#if defined(CONFIG_SYS_NS16550_COM5)
DECLARE_ESERIAL_FUNCTIONS(5);
struct serial_device eserial5_device =
INIT_ESERIAL_STRUCTURE(5, "eserial4");
#endif
#if defined(CONFIG_SYS_NS16550_COM6)
DECLARE_ESERIAL_FUNCTIONS(6);
struct serial_device eserial6_device =
INIT_ESERIAL_STRUCTURE(6, "eserial5");
#endif
__weak struct serial_device *default_serial_console(void)
{
#if CONFIG_CONS_INDEX == 1
return &eserial1_device;
#elif CONFIG_CONS_INDEX == 2
return &eserial2_device;
#elif CONFIG_CONS_INDEX == 3
return &eserial3_device;
#elif CONFIG_CONS_INDEX == 4
return &eserial4_device;
#elif CONFIG_CONS_INDEX == 5
return &eserial5_device;
#elif CONFIG_CONS_INDEX == 6
return &eserial6_device;
#else
#error "Bad CONFIG_CONS_INDEX."
#endif
}
void ns16550_serial_initialize(void)
{
#if defined(CONFIG_SYS_NS16550_COM1)
serial_register(&eserial1_device);
#endif
#if defined(CONFIG_SYS_NS16550_COM2)
serial_register(&eserial2_device);
#endif
#if defined(CONFIG_SYS_NS16550_COM3)
serial_register(&eserial3_device);
#endif
#if defined(CONFIG_SYS_NS16550_COM4)
serial_register(&eserial4_device);
#endif
#if defined(CONFIG_SYS_NS16550_COM5)
serial_register(&eserial5_device);
#endif
#if defined(CONFIG_SYS_NS16550_COM6)
serial_register(&eserial6_device);
#endif
}
#endif /* !CONFIG_NS16550_MIN_FUNCTIONS */

42
src/soc/broadcom/cygnus/uart.c
View File

@ -1,42 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boot/coreboot_tables.h>
#include <console/uart.h>
void uart_init(int idx)
{
}
void uart_tx_byte(int idx, unsigned char data)
{
}
void uart_tx_flush(int idx)
{
}
unsigned char uart_rx_byte(int idx)
{
return '\0';
}
void uart_fill_lb(void *data)
{
}